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JUNE/JULY, 1980. 



ISSUE 2. 



$2.00 



compute II. 



The Single-Board" COMPUTE™ 

' - - ^ ' i 






■- : ?"*i 




— 



June/ July, 1980. 



compute II. 



Some A/D 
And D/A 
Conversion 
Techniques 

Marvin L De Jong 

Department of Mathematics-Physics 

The School of the Ozarks 

Pt. Lookout, MO 65726 

INTRODUCTION 



The purpose of this paper is to de- 
scribe some A/D conversion circuits 
and programs that can be used with 
6502 based microcomputer systems. 
A digital-to-analog (D/A) converter 
is also described. Our motivation 
for this project was an NSF Short 
Course on the Science of Sound. 
The complete project was to be a 
circuit that would sample some 
waveform, from an electric guitar 
for example, and a program that 
would perform a Fast Fourier 
Transform (FFT). The Fast Fourier 
Transform program has not yet been 
completed, but the necessary A/D 
circuit and driver programs have 
been completed and are herein 
described. A digital- to- analog 
converter allows the sampled wave- 
form to be displayed on an oscillo- 
scope, producing a much improved 
storage oscilloscope over our original 
"storage scope" described in THE 
BEST OF MICRO, Volume 1, 
page 30, and Volume 2, page 61. 
Some results of our experiments are 
also included. 

The analog-to-digital converter 
is based on the AD570, an 8-bit 
A/D converter sold by Analog De- 
vices, Route 1 Industrial Park, 
P.O. Box 280, Norwood, MA 
02062. Its nominal conversion time 
is 25 microseconds, allowing a 
maximum sampling rate of 40,000 
kHz. (The time necessary to read 
the converter and store the data 
will reduce this rate.) The AD570 
requires no external components, 



and can be operated either in a 
bipolar or a unipolar mode. We 
chose it because it is inexpensive, 
relatively fast, and easy to inter- 
face. 

The D/A converter we used is 
a Signetics NE5018. It is also easy 
to interface because it has input 
latches. It can be operated with few 
external components, but it is not 
an exceptionally fast converter. A 
better choice would have been the 
Analog Devices 565, but this would 
have required an 8-bit latch. 

The circuits shown here inter- 
face to the expansion connectors on 
the KIM-1 or the AIM 65. With 
little modification they could be 
connected to a SYM-1. The applica- 
tion connector is left free for 
other devices. In particular, we had 
hoped to do our mathematics for the 
FFT program with an AM95 1 1 
Arithmetic Processor Unit interfaced 
to the 1/0 ports on the application 
connector. In any case, Appendix A 
suggests a circuit for interfacing 
the converters to a 6522 Versatile 
Interface Adapter. 

Description Of The Circuit 

The complete A/D, D/A, and oscil- 
loscope trigger circuitry is shown in 
Figure 1 . This circuit was used to 
interface the converters to an AIM 
65 microcomputer, and all the 
necessary connections are available 
at the expansion connector, includ- 
ing the DS9 device select pulse. 
The same circuit could be used with 
a SYM-1 if the DS18 device select 



pulse, available on the SYM-1 ex- 
pansion connector, were used. In 
that case the addresses used to acti- 
vate the various circuits would be 
$1800 through $1803. In Figure 1 
you will notice that addresses $9000 
through $9003 produce pulse on the 
Y Q through Y 3 outputs on the 
74LS138. For example, a STA 
$9000 instruction produces a nega- 
tive one microsecond pulse on Y o . 
This pulse is applied to the CLEAR 
input on the 74LS74 flip-flop and 
it will cause the Q output to go to 
logic zero. A logic one to logic zero 
transition on the B/C pin of the ana- 
log-to-digital converter (AD570) 
starts a conversion . Approximately 
25 microseconds later the data is 
ready at the outputs of the AD570. 
These outputs are connected to an 
octal, three-state, buffer-driver 
(81LS97). A LDA $9001 instruction 
activates the 81LS97 and puts the 
data on the microcomputer's data 
bus. The trailing edge of the same 
device select pulse that enables 
the 81LS97 clocks the 74LS74 back 
into its "Qhigh" logic state. 
This completes one analog-to-digital 
conversion. 

The analog input voltage is 
applied to pin 13 of the AD570. 
The 15 ohm resistor can be omitted 
if a slight loss of precision is of 
no concern. With the bipolar offset 
switch open, as shown in Figure 1, 
voltages between -5 V and +5 V 
will be converted to a binary number 
between $00 and $FF respectively. 
A binary output of $80 corresponds 
to pin 13 being at zero volts. If 
the bipolar output switch is closed, 
the AD570 will read voltages be- 
tween V and + 10 V. The AD 
570 will also work with a negative 
supply voltage of - 1 2 V rather than 
the -15 V shown in Figure 1. 
Although a "data ready" signal is 
available on the AD570, we chose to 
use software to wait for the conver- 
sion to be completed. One final 
note on the AD570: the input im- 
pedance for the analog input is only 
about 5 k ohm. Consequently it 
makes a very poor voltmeter unless 
a high impedance (a voltage follower 
circuit, for example) amplifier is 
placed between the analog input 



compute II. 



mode it simply provides a high 
impedance buffer for the AD570. 
The AD521 is a differential ampli- 
fier with a differential input impe- 
dance of about 3 X 109 ohms. 
Pin 3, the - input, need not be 
grounded but can be connected 
directly to the input voltage 
source. 

The circuits of Figures 1-3 
provide a complete A/D and D/A 
system that can be used for a large 
variety of applications including 
voltage measurements, temperature 
measurements, and the storage 
scope application described here. 

A/D and D/A Converter 
Software 

The program in Example 1 was 
designed to work with the AIM 65 
or any other system that has a 
6522 VIA available for timing pur- 
poses. The addresses used to start 
the conversion, read the A/D con- 
verter, load the D/A converter, and 
trigger the oscilloscope are $9000 
through $9003, respectively. If a de- 
vice select other than the DS9 is 
used to enable the 74LS138 decoder, 
then these addresses must be 
changed accordingly. For example, 
if the DS18 select on the SYM-1 
is used, then these addresses 
become $1800 through $1803, re- 
spectively. Since the KIM-1 does 
not have a 6522, we wrote another 
program that will work for it, and 
this program is listed in Example 
2. 

The program in Example 1 has 
a maximum sampling rate of one 
sample every 32 microseconds, or 
31,250 Hz. It allows the AD570 
exactly 28 microseconds to make 
a conversion if the Tl timer is 
loaded with $0000. If you have an 
AD570 that is slightly faster, try 
taking out the NOP instruction at 
$0F3A. If your AD570 is slightly 
slower, insert some extra NOP 
instructions after $0F3A. Change 
the various branch offsets according- 
ly. You can tell if you are giving 
the ADS 70 enough time by examin- 
ing the data it returns. 

The program in Example 1 has 
the following features. It 
continuously samples the analog 
voltage at the input of the A/D 



Figure 2. Modifications for the KIM-1. 



pn> — t — cg2a 



Device 
Select 



G2B 
74LS138 



B^" 



Js74LS74 




2 »«74LS32 



TO ENABLE ON 81LS97 



o 



4 *74LS32 



RAM-R/W 



-£> TO LE BN NE5018 



/OtJ-W /'"J C< ^r 



Example 1. A/D and D/A driver program for 6522 based timing. 


50F00 8D 00 90 


START 


STA CVNST 


Pulse 74LS74 flip-flop to be in a 
known 


0F03 AD 01 90 




LDA A/D 


condition with Q at logic one. 


0F06 A2 00 




LDX $00 


Initialize X register to zero 


0F08 A9 40 




LDA $40 


Initialize ACR of 6522 to put Tl in 


0F0A 8D 0B A0 




STA ACR 


its free-running mode. 


0F0D A9 00 




LDA $00 


Clear accumulator. 


0F0F F0 03 




BEQ TEST 


Branch to start the first conversion. 


0F11 AD 01 90 


AGN 


LDA A/D 


Read A/D converter 


0F14 8D 00 90 


TEST 


STA CVNST 


Start a conversion. 


0F17 8D02 90 




STA D/A 


Output A/D to D/A converter. 


0F1A C5 00 




CMP TRIG 


Compare conversion result with trigger 


0F1C B0 0E 




BCS SAMPLE 


level. Branch to sample an additional 


0F1E A5 01 




LDA TIMLO 


255 points if A/D exceeds trigger level. 


0F20 8D 04 A0 




STA TILL 


Load 6522 with the number of micro- 


0F23 A5 02 




LDA TIMHI 


seconds between conversions. 


OF25 8D 05 A0 




STAT1LH 


Start timer. 


0F28 90 37 




BCC AGN 


Branch to read A/D. 


0F2A AD 01 90 


MORE 


LDA A/D 


Read A/D 


0F2D 8D 00 90 


SAMPLE 


STA CVNST 


Start sampling waveform. 


0F30 9D 00 02 




STA TAB,X 


Previous result into table. 


0F33 E8 




INX 


X keeps track of the number of 



0F34 F0 0C 

0F36 AD 04 A0 
0F39 EA 
0F3A EA 
0F3B 2C 0D A0 
0F3E 70 E9 
0F40 50 F9 
0F42 8D 03 90 
0F45 EA 
0F46 EA 
0F47 8D 03 90 
0F4A BD 00 02 
0F4D 8D 02 90 
0F50 E8 
0F51 DO F7 
0F53 F0 ED 
$0000 



LOAF 



OUT 



NEXPT 



BEQ, OUT 

LDA T1CL 

NOP 

NOP 

BIT IFR 

BVS MORE 

BVC LOAF 

STA SCPTRG 

NOP 

NOP 

STA SCPTRG 

LDA TAB,X 

STA D/A 

INX 

BNE NEXPT 



conversions. 

When X = 00, 256 conversions are 

complete. 

Clear Tl interrupt flag. 

Fill in the 25 microsecond conversion 

time with no operation instructions. 

Has Tl timed-out? 

Yes, get another conversion. 

No, wait for timer. 

Trigger scope. 

Use an eight microsecond pulse to 

trigger scope. 

Get some data from the table. 
Output it to the D/A and the scope. 

Branch to get more data. 



BEQ OUT 
= TRIG; load with desired triggering level but not $00. 
$0001 = TIMLO; low-order byte of time interval between samples (microseconds). 
$0002 = TIMHI; high-order byte of time interval between samples. 
$0200 = TAB: base address of table to store 256 samples. 
$9000 = CNVST; a STA CVNST instruction will start an A/D conversion. 
$9001 = A/D; the analog-to-digital converter is read at this location. 
$9002 = D/A; write to this location to perform a digital-to-analog conversion. 
$9003 = SCPTRG; write to this location to trigger the oscilloscope. 



compute II. 



converter. When the conversion re- 
sult exceeds a preassigned level 
stored in TRIG (location $0000), 
the program proceeds to sample 
another 255 points on the wave- 
form at a rate determined by the 
numbers stored in TIMLO (location 
$0001) and TIMHI (location $0002). 
The 256 data points are stored in 
page two of memory. Once the 
data have been obtained, the pro- 
gram proceeds to read the data out, 
one point at a time, to the D/A 
converter for the purpose of dis- 
playing the values on an oscillo- 
scope. Each time the 256 points 
are output to the D/A converter, 
a trigger pulse is also supplied. 
Since the conversion time is 32 
microseconds with this program, 
there is no use loading the Tl 
timer with a number less than 32 
unless you wish to sample at the 
maximum rate. In that case, put 
$00 in location $0001. In the pro- 
gram in Example 1, Tl is in its free 
running mode, so its interrupt flag, 
IFR6, will be set every N + 1 
microseconds, where N is the 16-bit 
number loaded into Tl from loca- 
tions $0001 and $0002. Be sure to 
load the locations TRIG, TIMLO, 
and TIMHI before running the pro- 
gram. The program comments 
should explain how the program 
works. The first two instructions 
may produce a dummy conversion, 
but their real function is to put 
the 74LS74 flip-flop in a condition 
with Q, at logic one. The program 
consists of three main loops. The 
AGN loop continuously samples the 
incoming data, and the program 
branches out of this loop to the 
MORE loop when the incoming 
voltage exceeds the trigger level. 
In the MORE loop another 255 
points are produced. When this 
data has been gathered, the program 
branches to the OUT loop to out- 
put the 256 points to the D/A 
converter. 

The program in Example 2 
works in about the same way with 
the same purpose in mind, but it 
was used on the KIM-1. The 
sampling rate with this program 
is once every 39 microseconds, 
or 25641 Hz. Its speed could be 



Figure 3. Preamplifier circuit 
for the A/D converter. 



E> 



S7 




— £>v o 

XI TO a/d converter 



R2 
Rl 



Example 2. A/D and D/A driver program for a KIM-1 interface. 



0300 8D 00 04 
0303 AD 01 04 
0306 A2 00 
0308 A9 00 
030A 8D 00 04 
030D 8D 02 04 
0310 C5 00 
0312 B0 16 

0314 EA 

0315 EA 

0316 EA 

0317 EA 

0318 EA 

0319 EA 
031 A EA 
031B AD 01 04 
031E 90 EA 

0320 8D 00 04 
0323 9D 00 02 

0326 E8 

0327 F0 13 



START 



TEST 



MORE 



STA CVNST 

LDA A/D 

LDX $00 

LDA $00 

STA CVNST 

STA D/A 

CMP TRIG 

BCS SAMPLE 

NOP 

NOP 

NOP 

NOP 

NOP 

NOP 

NOP 

LDA A/D 

BCC TEST 

STA CVNST 

STA TAB,X 

INX 

BEQ OUT 



Pulse 74LS74 flip-flop to be in a known 
condition with Q, a t logic one. 
Initialize X register to zero. 
Initialize accumulator to zero. 
Start A/D conversion. 
Previous result into D/A converter. 
Compare conversion result with trigger 
level. Branch to sample 256 points if 
voltage exceeds trigger level. 
Delay with no-operation instructions 
until the 25 microsecond conversion 
time is completed. 



Read A/D converter. 

Branch to start another conversion. 

Start an A/D conversion. 

Previous result into table. 

X keeps track of number of conversions. 

When X = 00, 256 conversions are 

complete. 

Get time in microseconds from $0001. 

Store in divide-by-one timer. 

Fill in time to make 25 microseconds 

before reading A/D converter. 



0329 A5 01 SAMPLE LDA TIME 
032B 8D 04 17 STA TIMER 
032E EA NOP 
032F EA NOP 

0330 EA NOP 

0331 EA NOP 

0332 AD 01 04 LDA A/D 
0335 2C 07 17 LOAF BIT TIMER 
0338 30 E6 BMI MORE 
033 A 10 F9 BPL LOAF 
033C 8D 03 04 OUT STA SCPTRG 
033F A2 00 LDX $00 
0341 8D 03 04 STA SCPTRG 
0344 BD 00 02 NEXPT LDA TAB,X 
0347 8D 02 04 STA D/A 
034A E8 INX 
034B DO F7 BNE NEXPT 
034D F0 ED BEQ OUT 
$0000 = TRIG; load with desired triggering level. 
$0001 = TIME: load with time (in microseconds) between samples. 
$0400 = CVNST; a STA CVNST instruction will start an A/D conversion. 
$0401 = A/D; the analog- to-digital converter is read at this location. 

$0402 = D/A; write to this location to perform a digital-to-analog conversion. 
$0403 = SCPTRG; write to this location to trigger the oscilloscope. 



Read converter. 

Has timer timed out? 

Yes, then start another conversion and 

store the result of the last. Otherwise 

wait. Trigger the oscilloscope. 



Get some data from the table. 
Output it to the D/A and the oscillo- 
scope. 

Branch to get more data. 
Return to output table again. 



io 



compute II. 



improved to be about the same as 
the program in Example 1. In any 
case, the on-board timers on the 
KIM-1 were used to produce the 
necessary timing. Again, the 
trigger level is stored in $0000, 
and the time is stored in $0001. 
The divide-by-one timer at $1704 
on the KIM-1 was used, but the 
other timers may also be used. 

The last program listing for the 
circuit in Figure 1 is a program that 
can be used to sample a waveform 
at as many points as your R/W 
memory will allow. Rather than use 
just one page of R/W memory for 
storing the waveform, it will use as 
many pages as you have available. 
The maximum sampling rate for this 
program is one sample every 43 
microseconds or 23256 Hz. The 
program in Example 3 uses several 
of the same locations as the 
program in Example 1 . The trigger 
level is stored in TRIG at $0000. 
The 16-bit number giving the num- 
ber of microseconds between sam- 
ples is stored in TIMLO at $0001 
and TIMHI at $0002. The low- 
order byte of the base address of 
the table to store the conversion 
data is in location TAB at $0003. 
Normally this location initialized to 
$00. The high-order byte of the 
base address (page number) of the 
table is stored in TAB + 1 at 
$0004. For our experiments with 
the AIM 65 we used pages $02 
through $0E. The page number of 
the last page you wish to fill 
with data is incremented by one 
and stored in location END at 
$0005. Thus if page $0E is the last 
page to be used to store data, then 
$0F is stored in END. Load loca- 
tion $0006, STARTP with the same 
value you put in $0004 if you wish 
to output all the results to the D/A 
for display on the oscilloscope. 

The program in Example 3 
samples an incoming waveform at 
N*256 points where N is the number 
of pages used to store the data. 
It then outputs all of these points 
to the D/A converter at the same 
rate that it sampled the waveform. 
If you want to output the results 
faster, replace the BIT IFR and 
BVC WAIT instructions at $0f5D 
with NOPs. 



Example 3. N-Page A/D Conversion and Storage Program 



#0F00 8D 00 90 START 
0F03 AD 01 90 
0F06 A0 00 
0F08 A9 40 
0F0A 8D 0B A0 
0F0D A9 00 
0F0F 8D 00 90 AGN 
0F12 8D 02 90 
0F15 C5 00 
0F17 B0 21 
0F19 A5 01 

0F1B 8D04A0 
0F1E A5 02 
0F20 8D 05 A0 
0F23 AD 01 90 

0F26 90 E7 

0F28 8D 00 90 DATA 

0F2B 91 03 

0F2D C8 

0F2E DO 0A 

0F30 E6 04 

0F32 A5 04 

0F34 C5 05 

0F36 90 09 

0F38 B0 14 

0F3A EA SAMPLE 

0F3B EA 

0F3C EA 

0F3D EA 

0F3E EA 

0F3F A5 05 

0F41 AD 04 A0 MORE 

0F44 AD 01 90 

0F47 2C 0D A0 LOAF 

0F4A 70 DB 

0F4C 50 F9 

0F4E 8D 03 90 NOMORE 

0F51 A5 06 

0F53 85 04 

0F55AD04A0 RPT 

0F58 Bl 03 

0F5A 8D 02 90 

0F5D2C 0DA0 WAIT 

0F60 50 FB 

0F62 C8 

0F63 DO F0 

0F65 E6 04 

0F69 C5 05 

0F6B 90 EA 

0F6D B0 El 



STA CVNST 
LDA A/D 
LDY $00 
LDA $40 
STA ACR 
LDA $00 
STA CVNST 
STA D/A 
CMP TRIG 
BCS SAMPLE 
LDA TIMLO 

STA TILL 
LDA TIMHI 
STA T1LH 
LDA A/D 

BCC AGN 

STA CVNST 

STA (TAB),Y 

INY 

BNE EQUAL 

INC TAB + 1 

LDA TAB + 1 

CMP END 

BCC MORE 

BCS NOMORE 

NOP 

NOP 

NOP 

NOP 

NOP 

LDA TAB + 2 

LDA T1CL 

LDA A/D 

BIT IFR 

BVS DATA 

BVC LOAF 

STA SCPTRG 
LDA STARTP 
STA TAB + 1 
LDA T1CL 
LDA (TAB),Y 
STA D/A 
BIT IFR 
BVC WAIT 
INY 

BNE RPT 
INC TAB+1 
CMP END 
BCC RPT 
BCS NOMORE 



Pulse 7474 to be in a known condition, 

with Q at logic one. 

Initialize Y to zero for indirect indexed 

addressing that follows. 

Put 6522 Tl in free-running mode. 

Clear A. 

Start a conversion. 

Output result to D/A converter 

Compare conversion result with trigger 

level. 

Get low-order byte of time between 

conversions. 

Result into Tl. 

Get high-order byte of time between 

conversions 

Read A/D converter to get conversion 

level. 

Return to compare with trigger level. 

Start an A/D conversion. 

Result of previous conversion into table. 

Branch around the page number incre- 
ment routine. 
Increment page number 
Now compare it with the ending page 
number. 

Fill another page. 

Table is filled, branch to output the table. 
These NOPs equalize the time between 
loading the table when no page boundary 
is crossed and when a page boundary is 
crossed. 

This is also a dummy instruction. 

Clear the Tl interrupt flag. 

Read the A/D converter. 

Has the timer timed-out? 

Start another conversion. 

Wait for timer. 

Trigger scope. 

Reload TAB with starting page number. 

Clear Tl interrupt flag. 
Get data from the table. 
Output it to D/A. 
Test Tl flag. 



Get some more data for the D/A converter. 



Get more data from a new page. 
Output the table again. 



We used this program to see 
how the waveform from a plucked 
guitar string varied with time, 
but we couldn't help connecting 
a microphone to the AD521 and 
using the program to output this 
speech sound to an audio amplifier. 
The results are quite good, even 
though we made no attempt to in- 
clude low-pass filters in either the 
input or output circuits. The word 
spoken into the microphone and out- 
put to an audio amplifier is intelli- 
gible and one can easily identify 
the person who made the sound. 
We had enough storage capability 
on the AIM 65 to store one three- 



syllable word. If you want a project, 
you might try improving the circuit 
and program to do a better job 
with speech. 

Results 

In Figure 4 we show a photograph 
of the results of sampling a 1000 
Hz sine wave at a rate of about 
25,000 Hz. The photograph shows 
256 points on the sine wave. Since 
we did not have a camera for our 
oscilloscope, the pictures were taken 
through a Celestron 5" telescope, 
placed about 25 ft. from the oscillo- 
scope. Figure 5 shows the scope 
trace expanded to show just one 



compute II. 



cycle of the same waveform in 
Figure 4. Figure 6 shows 256 
points of a 100 Hz sine wave 
sampled about once every 40 
microseconds, while Figure 7 shows 
256 points on a 10 Hz sine wave 
sampled once every 2000 micro- 
seconds. Figure 8 is the waveform 
of the A string of an electric 
guitar just after being plucked. 
The sampling rate in this case 
was about one sample every 85 
microseconds. Finally, in Figure 
9 we show a sampled version of a 
2500 Hz sine wave. Clearly the 
system still does a pretty good job 
of reconstructing a 2500 Hz sine 
wave, but the information in fre- 
quencies much above 5000 Hz will 
be lost. Hopefully these pictures 
are worth a thousand words. 

Figure 4. 256 points on a 1000 HZ Sine wave. 



Figure 6. 256 points on a 100 Hz Sine- wave 




Figure 7. 256 points on a 10Hz Sine wave. 



Figure 5. One cycle of a 1000 Hz Sine wave sampled at 
about 24,000 Hz. 



Figure 8. Plucked A string on an electric guitar 





12 



compute II. 



Figure 9. Several cycles of a 2500 Hz Sine wave. 




Figure 10. Interfacing the AD570 and 
the NE5018 to a 6522 Versatile 
Interface Adapter. Only data and con- 
trol connections are shown in this 
figure. Refer to Figure 1 for the other 
details. 



AD 570 

B&C 
DR 


9 


MSB 


17 






8 




16 


/ 


\ 


7 




X 1 ) 


6 




U 






? 




13 


PORT B 


4 




12 


\ 


/ 


? 




11 


2 


LSB 


10 


11 




19 


CB2 


17 




40 






9 


MSB 


9 








6522 VIA 

t 

PORT A 


LE 

NE5018 


8 




8 


7 




7 


6 




6 


*? 




5 


4 




4 


\ 


/ 


3 




7 


2 


T«ra 


2 













6502 
MACRO ASSEMBLER 

AND TEXT EDITOR 



Versions for PET, APPLE II, SYM, KIM 
and ATAR I (1st quarter 1980) 
Written entirely in machine language 
Occupies 8K of memory starting at $2000 — 
Apple version with disk occupies just over 
9K 

Macro and conditional assembly 
36 error codes, 26 commands, 22 pseudo ops 
Labels up to 10 characters 
Auto line numbering and renumber com- 
mand 

String search and string search and replace 
Copy, move, delete, load, save, and append 
commands 

Cassette and Manual $49.95 

(including U. S. postdge) 

Eastern House Software 



3239 Linda Dr. 



Winston-Salem, N. C. 27106 



Appendix A. Interfacing The Converters To A 6522 VIA 

The AD570 analog-to-digital converter and the NE5018 converter can easily be inter- 
faced to a 6522, eliminating the need for most of the control logic shown in Figure 1. AIM 65 
and SYM-1 users may wish to use the 6522 accessed at the application connector 
and the circuit shown in Figure 10. Note that only the data and control connections are 
shown in Figure 10. The other circuitry, mainly a few resistors and capacitors, can be found 
in Figure 1, as are the necessary power connections. This circuit eliminates the 74LS138, the 
74LS74, the 81LS97, and the various NAND, NOR, and INVERTER chips. The CA2 
pin on the 6522 could be used as an output to trigger the oscilloscope. Below find a short 
assembly language program that will collect 256 conversions and store them. This program 
has not been tried. 



HERE 
TEST 



LDA $FF 
STA DDRA 
LDA $18 
ORA ACR 
STA ACR 
LDA $FE 
AND PCR 
STA PCR 
LDA $03 
STASR 
LDA $02 
AND IFR 
BEQ TEST 
LDA IRB 
STA TAB,Y 
INY 
BNE HERE 



OUT 



Set up Port A as an output port. 

Set up the ACR so the shift register shifts out (on CB2) 
at the clock rate. 

Set up the PCR so a negative transition on CA1 sets 
its interrupt flag. 

The shift register is used to supply a 4 microsecond 
pulse to the A/D converter to start a conversion. 
Test to see if conversion is complete by reading IFR1. 



Read the A/D converter. 

Store the result in a one page table. 

When Y = 0, 256 conversions are complete. 
Otherwise get another conversion. 



compute II. 



13 



Some Routines From Microsoft 
Basic 



KIM 

2000 

203A 

2068 

2086 

2169 

2274 

22A2 

22E5 

22F2 

231F 

2348 

236A 

23F1 

2420 

2466 

24F2 

2521 

253C 

256B 

2579 

2608 

26 AA 

26CB 

26DA 

26E8 

2711 

272B 

273C 

278C 

27CA 
27D5 
27F2 
281F 
2845 
2853 
2857 
2875 
2888 
2898 
28B8 
28F2 

297B 
2A13 
2A35 
2A59 
2A7E 
2A8D 
2AB0 
2AB9 
2BA2 
2BC6 
2C34 
2C48 
2D82 
2D88 
2D99 
2D9E 
2DA5 
2DC5 
2E04 
2E34 
2E9F 
2EA9 
2F3D 
2FA3 
2FB4 
2FD4 
3181 
3195 
31A2 
31A8 
31B2 
31E0 
31F3 
3266 
3276 
3288 
32EF 
3321 
3434 
3471 
349A 
34D2 
34E3 
34F7 
3523 



SYM AIM OSI 
C003 B00A A000 
C03D B044 A038 
C06B B072 A066 
C089 B090 A084 
C16E B175 A164 
C1AB B1AC A1A1 
C1D9 B1DA A1CF 
C21C B21D A212 
C229 B22A A21F 
C256 B257 A24C 
C27E B27F A27 4 
C2A0 B29D A295 
C32C B329 A32E 
C359 B356 A34B 
C39F B3AE A3A6 
C427 B436 A432 
C456 B465 A461 
C472 B481 A68C 
C49F B4AE A4A7 
C4AC B4BC A4B5 
C535 B55C A556 
C5DA B601 A5FF 
C60A B631 A61A 
C619 B640 A62C 
C622 B65C A638 
C64B B685 A661 
C665 A67B 
C676 B69F FFF7 



FFF4 



C6B7 

B6AB 
C707 B6EC A691 
C712 B6F7 A69C 
C72F B714 A6B9 
C75C B741 A6E6 
C782 B767 A70C 
C790 B775 A71A 
C793 B778 A71D 
C7B2 B797 A73C 
C7C5 B7AA A74F 
C7D5 B7BA A75F 
C7F5 B7DA A77F 
C82F B814 A7B9 

B89D 
C8B8 B8A9 A829 
C94F B94A A8C3 
C971 B967 A8E0 
C991 B988 A904 

B9AD 
C9B0 B9BC A923 
C9DC B9E7 A946 
C9E5 B9F0 A94F 
CAB4 BADC AA1C 
CAD8 BB00 AA40 
CB43 BB59 AAAD 
CB57 BB7F AAC1 
CC9F BCB9 ABF5 
CCA5 BCBF ABFB 
CCB6 BCDO ACOC 
CCBB BCD5 AC 11 
CCC2 BCDC AC 18 
CCE6 BDOO AC27 
CD25 BD3F AC66 
CD55 BD6F AC96 
CE11 BDDA AD01 
CE5F BDE4 ADOB 
CEF3 BE78 AD8B 
CF57 BEDC ADE6 
CF68 BEED ADF7 
CF8B BF10 AE17 
D138 COBD AFAD 
D14C C0D1 AFC1 
D159 CODE AFCE 
D15F C0E4 AFD4 
D16C C0F1 AFDE 
D19A C11F BOOB 
D1AD C132 B01E 
D21E C1A3 B08C 
D22E C1B3 B09C 
D240 C1C5 BOAE 
D2A9 C232 B1 15 
D2DB C264 B147 
D3F2 C37B B24D 
D42F C3B8 B28A 
D458 C3E1 B2B3 
D490 C419 B2EB 
D4A1 C42A B2FC 
D4B5 C43E B310 
D4E1 C46A B33C 



Jim Butterfield, Toronto 

Description 

Action addresses for primary keywords 

Action addresses for functions 

Hierarchy and action addresses for operator 

Table of Basic keywords 

Basic messages, mostly error messages 

Search the stack for FOR or GOSUB activity 

Open up space in memory 

Test: stack too deep? 

Check available memory 

Send canned error message, then: 

Warm start; wait for Basic command 

Handle new Basic line input 

Rebuild chaining of Basic lines 

Receive line from keyboard 

Crunch keywords into Basic tokens 

Search Basic for given line number 

Perform NEW 

Perform CLEAR 

Reset Basic execution to start 

Perform LIST 

Perform FOR 

Execute Basic statement 

Perform RESTORE 

Check stop key 

Perform STOP or END 

Perform CONT 

Perform NULL 

Perform SAVE 

Perform LOAD 

Special AIM input routines 

Perform RUN 

Perform GOSUB 

Perform GOTO 

Perform RETURN, then: 

Perform DATA: skip statement 

Scan for next Basic statement 

Scan for next Basic line 

Perform IF, and perhaps: 

Perform REM: skip line 

Perform ON 

Input fixed-point number 

Perform LET 

Enable printer 

Perform PRINT 

Print string from memory 

Print single format character 

Handle bad input data 

Perform GET 

Perform INPUT 

Prompt and receive input 

Perform READ 

Canned Input error messages 

Perform NEXT 

Check type mismatch 

Evaluate expression 

Evaluate expression within parentheses 

Check parenthesis, comma 

Syntax error exit 

Setup for functions 

Variable name setup 

Set up function references 

Perform OR, AND 

Perform comparisons 

Perform DIM 

Search for variable 

Create new variable 

Setup array pointer 

Evaluate integer expression 

Find or make array 

Perform FRE, and: 

Convert fixed-to-floating 

Perform POS 

Check not Direct 

Perform DEF 

Check FNx syntax 

Evaluate FNx 

Perform STR$ 

Do string vector 

Scan, set up string 

Build descriptor 

Garbage collection 

Concatenate 

Store string 

Discard unwanted string 

Clean descriptor stack 

Perform CHR$ 

Perform LEFT$ 

Perform RIGHT$ 



Routines were identified by examining 
specific machines. There may well be 
other versions of Basic on these 
machines; the user is urged to exercise 
caution. 

OSI is from a C2-4 machine. KIM is 
a cassette tape version. SYM and AIM 
are the ROM versions. 
The addresses given identify the start 
of the area in which the described 
routine lies. This may not be the pro- 
per program entry point or calling 
address. 
©Copyright 1980, Jim Butterfield 

Perform MID$ 

Pull string data 

Perform LEN 

Switch string to numeric 

Perform ASC 

Get byte parameter 

Perform VAL 

Get two parameters for POKE or WAIT 

Convert floating-to-fixed 

Perform PEEK 

Perform POKE 

Perform WAIT 

Add 0.5 

Perform subtraction 

Perform addition 

Complement accum/M 

Overflow exit 

Multiply-a-byte 

Constants 

Perform LOG 

Perform multiplication 

Unpack memory into accum#2 

Test & adjust accumulators 

Handle overflow and underflow 

Multiply by 10 

10 in floating binary 

Divide by 10 

Perform divide-by 

Perform divide-into 

Unpack memory into accural 

Pack accum#1 into memory 

Move accum#2 to #1 

Move accum#1 to #2 

Round accum#1 

Get accum#1 sign 

Perform SGN 

Perform ABS 

Compare accum#1 to memory 

Floating-to-fixed 

Perform INT 

Convert string to floating-point 

Get new ASCII digit 

Constants 

Print IN, then: 

Print Basic line # 

Convert floating-point to ASCII 

Constants 

Perform SQR 

Perform power function 

Perform negation 

Constants 

Perform EXP 

Series evaluation 

RND constants 

Perform RND 

Perform COS 

Perform SIN 

Perform TAN 

Constants 

Perform ATN 

Constants 

CHRGET sub for zero page 

Remaining routines are Basic startup. 



352E 


D4EC 


C475 


B347 


3556 


D516 


C49F 


B36F 


3573 


D531 


C4BA 


B38C 


3579 


D537 


C4C0 


B392 


3582 


D540 


C4C9 


B39B 


3592 


D550 


C4P9 


B3AB 


35A4 


D562 


C4EB 


B3BD 


35E3 


D5A1 


C52A 


B3FC 


35EF 


D5AD 


C536 


B408 


3605 


D5C3 


C54C 


B41E 


3610 


D5DA 


C563 


B429 


3619 


D5E3 


C56C 


B432 


3635 


D5FF 


C588 


B44E 


363C 


D606 


C58F 


B455 


364E 


D618 


C5A6 


B467 


3765 


D6FD 


C686 


B537 


379C 


D734 


C6BD 


B56 4 


37A1 


D739 


C6C2 


B569 


3802 


D772 


C6FB 


B59C 


3830 


D7A0 


C729 


B5BD 


386E 


D7DE 


C76A 


B5FB 


3904 


D842 


C7CB 


B64D 


392F 


D86D 


C7F6 


B673 


394C 


D88A 


C813 


B6 90 


395A 


D898 


C821 


B6 9E 


3971 


D8AF 


C838 


B6B5 


3976 


D8B4 


C83D 


B6B9 


3987 


D8C5 


C846 


B6CA 


398C 


D8CA 


C851 


B6CF 


3A1A 


D958 


C8E1 


B7 4B 


3A3F 


D97D 


C906 


B76B 


3A74 


D9B2 


C93B 


B7 9B 


3A84 


D9C2 


-C94B 


B7AB 


3A93 


D9D1 


C95A 


B7BA 


3AA3 


D9E1 


C96A B7CA 


3AB1 


D9EF 


C978 


B7D8 


3AD0 


DA0E 


C997 


B7F5 


3AD3 


DA11 


C99A 


B7F8 


3B13 


DA51 


C9DA 


B831 


3B44 


DA82 


CA0B 


B862 


3B6B 


DAA9 


CA32 


B887 


3C0A 


DB3B 


CABD 


B912 


3C3F 


DB70 


CAF2 


B947 


3C4E 


DB7F 


CB01 


B953 


3C55 


DB86 


CB0C 


B95A 


3C69 


DB9A 


CB1C 


B96E 


3D99 


DCCA 


CC4C 


BA96 


3DC2 


DCF3 


CC75 


BAAC 


3DCC 


DCFD 


CC7F 


BAB6 


3E05 


DD36 


CCB8 


BAEF 


3E10 


DD41 


CCC3 


BAFA 


3E3E 


DD6F 


CCF1 


BB1B 


3E91 


DDC2 


CD44 


BB6E 


3EDB 


DE0C 


CD8E 


BBB8 


3EE3 


DE14 


CD96 


BBC0 


3F1F 




CDD2 


BBFC 


3F26 




CDD9 


BC03 


3F6F 




CE22 


BC4C 


3F9B 




CE86 


BC78 


3FD3 






BC99 


4003 






BCC9 


4041 


DE50 


CE86 


BCEE 



June/ July, 1980. 



compute II. 



17 



Nuts and Volts 

Gene Zumchak 
1700 Niagara Street 
Buffalo, N.Y. 14207 

In the first N & V discussion, I talked about read/ 
write timing in general, and 6502 timing in particular. 
Fast TTL chips can be used with the 6502, but so 
can most of the I/O chips of other processor families, 
provided all the timing requirements are resolved. 
Even chips with apparently incompatible timing re- 
quirements can usually be accomodated by using tricks 
like latching the write data, or shortening the write 
strobe, as discussed in the first column. Let's consider 
what is required to interface a popular port chip of the 
8080 family. 

The 8255A port chip has 24 I/O pins, program- 
mable in groups of four or eight bits as inputs and 
outputs. The ports can be used as simple ports, ports 
with handshaking (and interrupts) and even as bidirec- 
tional buses. The reader might want to dig up a spec 
sheet to study this versatile chip. The "A" suffix of 
the part number is important. The original 8255 (with- 
out the "A") had long set-up and hold time require- 
ments. The 8255A, like newer Intel family chips, 
has improved timing specs with a 100 ns. set-up 
time and 30 ns. hold time, completely 6502 compatible. 

The low-true read gate of the 8255A, RD, can be 
the inverted R/W signal which need not (but can be) 
gated with 02. The low-true write strobe, WR, is met 
by the normal 6502 write strobe, which we saw 
earlier is 02 NANDed with the inverted R/W line. 
A high true Reset signal must be provided. Like most 
peripherals, it has a low-true chip select. Figure 1. 
shows the connections which satisfy the 8255A's 
timing requirements. 



Figure 1. 



i< 2 

R/W. 

RES 
SEL- 



;=£> 



i> 



WR 
RD 
RES 

CS 

8255A 



Interfacing 8255A Port 



If you have an 1/0 application requiring more than 16 
pins, or you covet some other 8255 A feature, there's 
no electronic reason why you cannot use this chip 
with your 6502 system. The same can be said of 
1/0 chips from other families. Clearly, all families 
are designed to be both voltage level and drive 
compatible with TTL and hence with each other. As 
we can see, accommodating the read/ write timing need 
not be difficult. 
Using Port Chips 

The most commonly used family accessory chips are 
the 1/0 port chips. However, when simple 1/0 is 
required, port chips may not be the best choice. 
Family chips, including port chips, are not inexpen- 
sive. Port chips typically sell in the $8 to $15 
range. Since they are MOS devices, their drive 
capability is usually just one TTL load. They are also 
vulnerable to static. Since their data bus lines also 
can only drive a single TTL load, their use is limited 
to the internal unbuffed data bus around the pro- 
cessor. One could interface them to a buffered bus 
with bidirectional buffers, but these buffers are 
expensive and power hungry. MOS port chips, there- 
fore, are most attractive for use in small dedicated 
controllers, especially where power and parts count are 
important considerations. 

In applications using a buffered bus, where simple 
1/0 is adequate, and where ruggedness and drive 
capability are important, TTL 1/0 is more attractive, 
and usually much cheaper. 
TTL Input 

To make an input port, we need a set of tri- 
state® (® trademark National Semiconductor) gates which 
are gated in unison. A tri-state gate is an electronic 
switch. When enabled, the output reflects the input 
(sometimes with inversion). When disabled, the output 
is high impedance or floating. Thus a large number 
of tri-state outputs can be bussed together, provided 
that only one set or device is enabled at one time. 
RAM chips, ROM chips, and any other devices de- 
signed to attach directly to a bidirectional data bus 
have built in tri-state outputs. 

TTL tri-state gates come in quad, hex, and octal 
configurations. Quad types like the 74LS125 have indi- 
vidual enables for each gate. Hex types like the 8T97, 
74LS367, 8097 etc. have four gates with one enable, 
and two gates with one enable. Although octal gates 
are the most attractive for eight bit processors, the 
supply has not kept up with the demand, and hex 
types are a little easier to come by. Octal types 
81LS97 (Nat.) and 74LS244 are not pin compatible. 

All that's required to use some tri-state gates as 
an input port is a low-true read gate. This is ob- 
tained by ANDing of the R/W line in the read 
state, and a chip select decoded from the address 
lines. Figure 2. shows a couple of possibilities, de- 
pending upon the polarity of the chip select. 



18 



compute II. 



June/July, 1980. 



Figure 2. 

INI 

IN2 



^ 
^ 



IN8 



&■ 



R/W 
CS 




RG, 



- DO 

- Dl 

DATA 
BUS 

- D7 






R/W 
CS 



TTL Input Port With Gating 



If read gate signals are required for several ports, 
a single three to eight decoder chip can be used to 
get eight read gates from a coarser select. The R/W 
line is used as an enable and is internally gated with 
all the outputs, as shown in figure 3. 



Figure 3 
74LS138 



R/W 
CS1 

A2 

Al 
AO 



-cG2a 



■CG2B 



Gl 



a 



R7 
R6 
E5 

R4 
R3 
R2 
Rl 
RO 



Input Port Read Selects 



One nice feature of TTL tri-state gates is that they 
are always buffers and are meant to drive busses. Low 
power Schottky devices are more desireable and 
usually adequate for most applications. 
TTL Output 

An output bit is a flip-flop which can be written 
to and from the data bus and whose output is connec- 
ted to the world. Output bits are usually "D" type 
flip-flops or latches. In TTL there are several 
configurations, duals, 74LS74, 74LS109; quads, 



74LS75, 74LS175; hex, 74LS174; and octal, 74LS273, 
74LS373, 74LS374 and others. Again octal types are 
sometimes a bit hard to come by. 

Output ports need a write strobe generated by 
ANDing the general purpose write strobe with a 
select decoded from addresses. Figure 4. shows an out- 
put port and the necessary write strobe. 



Figure 4. 



D7 




D 





















D 


Q 


1 


L>6 







-07 



06 




Output Port With Write Strobe 



Since TTL devices are very fast, they have set-up 
time requirements of only a few nanoseconds. There- 
fore the locking edge of the write strobe better 
come before the data goes away. That is, the 02 
closest to the processor must be used, and not any 
delayed versions. With a little care, we can use a 
single decoder chip to generate write strobes for several 
ports as in Figure 5. 



Figure 5. 
74LS138 




Output Port Write Strobes 



June/July, 1980. 



compute II. 



19 



From the data sheet for the 74LS138, we see that the 
delay from the high true enable input (Gl) to any out- 
put is a maximum of 26 ns. (typically 17 ns.). This 
is quite acceptible, provided that we are not using 
a delayed 02. 

Now if you are building a small dedicated con- 
troller, you certainly may not need eight input ports 
or eight output ports. There *s no reason why you can- 
not use a single 74LS138 to give you gates and 
strobes for four of each. 

Figure 6. 
74LS138 




Figure 6 shows a 74LS138 wired to give four read 
gates and four write strobes. In a dedicated controller, 
you usually have memory space to burn so that you 
can afford to waste some. In figure 6. we apply 
address lines directly to the enables. This puts the 
ports in an 8K block of memory starting with $4000. 
The Nand gate generates the general purpose write 
strobe. It is applied to the "C" input of the de- 
coder. When it is low, a write strobe is generated, 
when high, a read gate. The maximum delay through 
the NAND gate is 15 ns, through the decoder, a 
maximum of 26 ns. Thus 02 experiences a worst case 
delay of 41 ns. to the trailing edge of the write 
strobe. This would be acceptable even if there was no 
data bus buffer delay to compensate it. 
Summary 

Interfacing I/O to an existing system or a do-it- 
yourself prototype is not difficult as long as you 
understand and consider read/write timing. Family 
chips from any family are useable. Some applica- 
tions may favor family chips. Others may suggest 
TTL. The gates and strobes required by TTL I/O 
are easy to generate. 

In the next column I will talk about address decod- 
ing and generating selects. Please feel free to 
write and suggest hardware topics that you would 
like me to write about. _ 



Write Strobes and Read Gates 



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June/July, 1980. 



compute II. 



21 



Programming 
& Interfacing 
the 6502, with 
Experiments, 

by Marvin L. Dejong. 

Howard W. Sams & Co., Inc. 
4300 West 62nd St. 
Indianapolis, IN 46268 
414 pages, $13.95 

Review by Jim Butterfield 

This book might have been subtitled, "A hands-on 
guide to the 6502." That's what it really is: it invites 
the owner of a KIM, SYM or AIM to learn the 
6502 by working through example after example on 
his machine. Most of us learn by doing, rather than 
just by reading; and this book contains eighty carefully 
graded "experiments" that encourage you to get your 
hands on the machine and prove to yourself that it 
works the way the book says. 

This is good stuff: the text and experiments 
are carefully graded and go at a gentle pace. You 
won't get very many advanced programming concepts 
here: the book covers only the basics. But it does a 
careful and thorough job. Early concepts are developed 
with care at a pace the beginner can cope with. 

As the title suggests, the book comes in two parts. 
Part I deals with programming the 6502, Part II 
with interfacing. Each chapter begins with a statement 
of objectives, identifying what you may expect to learn 
there. Each chapter ends with a series of experiments 
designed to reinforce what you have learned. An ex- 
periment often takes the form: "load this program .. 
now do this .. what do you see? .. can you explain 
why?". Emphasis is on gaining understanding as to 
how a simple program operates; the last experiment 
or two in a chapter often suggest small projects for 
the reader. 

Machine language is developed a few op-codes 
at a time. Loads, Stores, and Transfers are intro- 
duced first, and subsequent chapters progressively 
bring in more commands. Branches, for example, 
don't arrive until chapter six - I would rather have 
seen them a little earlier because I believe loops 
are so important - and the op codes aren't completely 
covered until chapter 9 has been completed. Advanced 
addressing modes, such as indexing and indirect 



addressing, are held back until chapter 8. It's all 
carefully graded, and the going is about as easy as 
it can be for machine language. 

The pace changes in Part II, Interfacing the 6502. 
We're thrown quite abruptly into the hardware field: 
logic diagrams, truth tables, timing charts and oscillo- 
scope traces start to appear with great rapidity. The 
author seems to assume that the reader will have some 
understanding of hardware, which is likely true for a 
sizable fraction of KIM/SYM/AIM owners. A begin- 
ner who isn't sure about the different shapes of AND 
and NOR logic symbols will have to work hard. 
In keeping with the accelerated pace of the 
material, Part II takes on a number of more ambitious 
projects, some of which might prove to be of special 
interest to readers. Music synthesis, an ASCII 
input port, data logging, a morse keyer, and a lunar 
occultation program are included; most are adapted 
from other sources but are accompanied by extra 
explanations. 

The book contains a quite extensive appendix sec- 
tion, with emphasis on hardware. Many of the data 
sheets are printed in very fine type and may be hard 
to read. An index is included. 

Is it possible to write a book which deals with 
three different machines-the KIM, SYM, and AIM? 
The experiments jump around from one machine to the 
other without always specifying which machine is 
intended. Even so, most users will be able to sort it out 
without too much trouble. Two key tables point out 
vital addresses on the respective machines; readers 
may find themselves repeatedly scrambling for page 44 
or 55 - I wish that these had been printed on fold- 
out sheets so that they could be visible during the 
experiments. 

The author deals carefully with difficult subjects; 
he doesn't gloss over the tricky parts but treats 
them with precision. One thing, however, bothers 
me: his notation for immediate-mode addressing. If 
you want to load the A register with the value 12 
decimal, any of the following may be used on most 
assemblers: — 

LDA #12 

LDA #$0C 

LDA #%00001100 

.. you may code the number in binary, decimal, 
hexadecimal or whatever, but you must include that 
pounds sign (#) to indicate Immediate mode. The 
author codes LDA $0C; most assemblers would take 
this to mean, "load the contents of address 12" 
- not the value 12. Readers will have to re-adapt when 
they start using an assembler. 

The book is a good, gentle introduction to pro- 
gramming the 6502. It's a little harder going for 
inter-facing, especially for hardware beginners. 

The "hands-on" nature of the experiments tend 
to drive the lessons home. It's a good way to come 
to grips with your computer. 



June/ July, 1980. 



compute II. 



35 



The Single- 
Board 6502 

Eric Rehnke 

The 5th West Coast Computer Faire was FAN- 
TASTIC!!! Besides having the chance to meet a 
number of you, I got a real good look at the 
latest developments in the small computer industry. 
I am very excited with what's happening. 

Everything is becoming increasingly sophisticated. 
Music, graphics, interface devices, software, applica- 
tions. . .and on and on. 

Graphics seemed to be one dominating theme 
of the show. Everywhere you looked was evidence on 
the fact. New and lower cost graphics peripherals 
were introduced. Two drum plotters for under $700, a 
graphics input device for $200, sophisticated 3-D 
software for the Atari machines, graphics animation 
on the Apple, the list goes on. 

Telecommunications is another area of the indus- 
try that is expanding greatly. This is an area which 
I am particularly interested in because of the fact 
that as a society, we will be facing an increasing 
need to replace fossil-fuel burning transportation with 
energy and time efficient communication. The office 
of the future will more than likely be in the home 
for people who can interact with their jobs through 
a low-cost computer terminal and a modem. 

We as computer hobbyists will have much to do 
with the future of tele-computing. We're the 
pioneers 

Basically, there are two broad types of informa- 
tion systems accessible today with low-cost equip- 
ment. The decentralized type of system includes 
PCNET (Personal Computer Network), CBBS (Com- 
munity Bulletin Board Systems) and the like. These 
systems are fairly casual, since they're more than 
likely run by hobbyists, have no access charges, 
and are, at the very least, excellent ways to become 
familiarized with computer " networking". 

The other, more centralized, approach is that 
taken by The Source and Micronet (to name two). 
These outfits have large computers with access to 
very large data bases and many other services 
available. You can write programs in many of your 
favorite languages (BASIC, COBOL, FORTRAN, 
APL, RPG),have access to such things as the UPI 
General wire service, stock exchange quotes, back- 
gammon, bridge, travel club, a buying service, file 
generators, editors, Star Trek and Football. On one 
service you can even download complete programs to 
your Apple, Pet or TRS-80 (how'd that one get in 
this column?). Anyhow, all kinds of stuff. 

All you need to access this myriad of service is a 
300 baud terminal and modem. But, to get the full 




For low-cost digital input (about $200), how about this? 
Your Apple (or whatever) simply .reads the position of 
the two pots which are mounted in the pivot points to 
compute the position of the arm. Clever, huh??? 

benefit of all the services, you should also have a 
microcomputer on your end of the phone line. 

Of course, with these large centralized informa- 
tion systems, you have access charges, passwords and 
the need of a plastic bank credit card to get into 
the system in the first place. Small price to pay for 
a little piece of the future, though. Beats the hell 
outa* the BOOBTUBE! 

Getting Hooked Up 

Presumably, you already have a computer and a 
terminal (or a computer with a built-in CRT) and are 
looking for a modem. The minimum modem necessary 
will be an originate only, acoustically coupled style 
capable of handling the BELL 103 standard modem 
protocol (300 baud). This will permit access to the 
centralized information system and the hobbyist bulle- 
tin board service but will not allow communica- 
tion with other hobbyists that have orginate-only 
modems. 

You see, for modem systems to communicate 
with each other, certain conventions must be adhered 
to. The most important of these states that the system 
that originates the phone call has to be in the "orgin- 
inate" mode while the system answering the call 
should be in the "answer" mode. This originate/ 
answer mode business has to do with the set of 
frequencies that's used to send the data and need 
not concern us here except to realize that to be 
able to receive calls as well as place them, you 
need both modes (orginate and answer) in your 
modem system. 

Now modems can couple up to the telephone 
line in two ways: acoustically and directly. 

With an acoustically coupled modem, you must 
usually place the telephone call manually and put 
the telephone handset into rubber cups on the modem 



36 



compute II. 



June/July, 1980. 



when the telephone call is connected. 

This type of modem is easiest to install, adequate 
for most applications, and available from several 
sources in the $150--$200 price range. 

If you expect your computer/modem system to be 
able to automatically answer the phone to carry on a 
conversation with another system or even be able to 
automatically place phone calls to other systems 
without user intervention, you'll want a direct- 
coupled modem instead of an acoustically-coupled type. 

Most direct-coupled modems plug into a modular 
style phone jack like your extension phone does and 
allow for full computer control of the line. 

Keep in mind that to be completely legal, the 
" modem MUST use a data coupler that has been 
registered with the FCC guys. Now that's important. 

Having a fully automatic telephone system hooked 
to the old computer benefits you in several ways. 
First, you can take messages from other systems all 
day long while you're at work or out playing golf 
(of course, this presumes you have enough friends to 
make it all worthwhile). And secondly, your computer 
can place calls to your friendly local (or long distance) 
data base very late at night to take advantage of 
low activity and/or cheaper phone rates. You could 
even download the complete UPI news service to your 
disk so you can enjoy the up-to-the-minute news with 
your coffee in the morning. Since the data stream is 
happening at 300 baud, your computer could sit and 
scan for key words-picking out only what you're 
interested in reading about. Quite a bit more effi- 
cient than the newspaper. Wouldn't you say? 

Anyhow, there are three modem manufacturers 
which seem interested in supporting the hobby/ 
personal computer market. They are 
U. S. Robotics Inc. 
1035 W. Lake St. 
Chicago, IL 60607 
(312) 733-0497 
NOVATION Inc. 
18664 Oxnard St. 
Tarzana, Ca 91356 
(213) 996-5060 
TNW Corp. 
5924 Quiet Slope Dr. 
San Diego, Ca 92129 
(714) 225-1040 
(TNW modem useable only with PET or other IEEE 
Bus computer) 

There are other companies making modems for this 
market, such as D. C. Hayes but most of these are 
useable only with certain bus configurations such as 
Apple or S-100. If you have one of these machines, 
this part of this column won't prove very useful 
to you. 

I placed a call to U.S. Robotics to get more 
data on their 300 baud, direct coupled modem and 
was treated very well. They expressed a willing- 



ness to help me with my application and even 
sent me all their technical literature on the promise 
that I'd sent them a $5.00 check. No, I didn't 
tell them that I wrote a column for COMPUTE II. 
As far as they knew, I was just another hobbyist. 

I also had some contact with TNW Corporation. 
They manufacture stuff for the PET (or other IEEE 
Bus equipped computers) so their direct-couple modem 
didn't turn out to be as useful for my particular 
application. But, if you're looking to turn your 
PET into an electronic mail system, TNW has the 
software and hardware to do just that. I believe 
they are working very closely with the PCNet 
people so they should have some good software 
coming out. 

As it turns out, the PCNet software protocol is 
a bit on the complicated side for those of us not well 
versed in the esoterics of network theory and the 
like, so having a software package alredy prepared 
looks mightly appealing. 

My personal application for a modem includes use 
on the PCNet as well as checking into one of the 
large time sharing systems like the Source or Micro 
Net (or both). Since I may want to automatically 
access a data base late at night, the modem/ 
telephone interface needs to be fully automated. 

I'll be checking out modems for a while and 
will report my findings. 



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Dept. C 



June/ July, 1980. 



compute II. 



37 



Barcodes Come Of Age!!! 

Back in 1976 (November to be exact) BYTE 
magazine introduced an interesting concept regarding 
program entry from magazine pages (or other printed 
media). 

Using a code very similar to the Universal Product 
Code, which can be found on just about anything 
you purchase anymore, programs (and data) can be 
reproduced on paper in a form that can be fed 
directly into your computer. This, of course, elimi- 
nates, the laborious typing in of magazine soft- 
ware. Just think about the amount of wasted energy 
when 10,000 computerists across the country have to 
type in the same program? Now THAT amounts to 
a lot of effort!!! Well, this new scheme could put an 
end to all that. 

I'll bet you're wondering if it's so great, why 
aren't all the magazines offering software in bar- 
code format. Well, that's a fair question — and the 
answer is that up until now, bar code reading wands 
have cost from $300 up. 

But that's all changed since Hewlett-Packard 
introduced the HEDS-3000 bar-code data entry wand 
for around $100 in single quantities. Now, for a 
little more than the price of a good audio cassette 
deck, you can have a truly revolutionary peripheral 
device for your computer! 

Think of all the neat things that can be done with 
such a device. You computer music users now have 
the ability to load musical scores directly into your 
"instrument" (providing of course, music publishing 
companies print music in some sort of bar code 
format). Industrial controllers could have the 
control program or several programs printed right 
on the face plate for ease of operator input. You 
could easily input trip data to your car computer 
or phone numbers to your communication computer. 
The applications are numerous. 

The April 1980 issue of BYTE has an article 
on the new HP bar code reader and the biblio- 
graphy of past BYTE articles written on the subject, 
so I'd suggest you start there if you want more 
information. 

-HP can be contacted directly at: 640 Page Mill 
Rd., Palo Alto, CA 94394 Attention: John Sien. 

I'm very tempted to spring for one of these 
devices but will probably have to put it under the 
modem on my priority purchase list. 

If you'd like to see COMPUTE (or COMPUTE 
II) publish software in bar code format contact 
Robert Lock and make yourselves known. 

MTU Graphics 

I received the Micro Technology Unlimited 
Visible Memory board a short time ago and have 
been working on application ideas for this rather 
unique board. 

For those of you not familiar with it: Visible 
Memory is both an 8K dynamic RAM board with 



invisible refresh AND a 320x200 bit-mapped video 
graphics board. 

This clever design makes use of the fact that 
the video circuitry must read the entire 8K 
block at specified intervals and allows it to serve 
the double purpose of also refreshing the dynamic 
RAM. You're wondering why you didn't think of 
it, right? 

"Bit-mapped" means that every bit in the 320x 
200 screen matrix is represented by one bit in the 
screen memory. With this board, one has total control 
over every pixel. It's very similar to the Apple hi- 
resolution graphics in that respect, with the exception 
that the MTU board is slightly denser (320x200 vs. ' 
280x193). 

MTU also has some software available for this 
board that could, assuming you owned an AIM-65, 
turn your computer into a low cost version of the 
HP-85. One software package works together with 
AIM Basic to allow such things as mathematical 
functions to be graphed out on the display while 
another software package allows the built-in AIM 
printer to record whatever pattern is on the screen. 
How does that sound? That same software also 
allows text lines up to 80 characters in length 
to be printed SIDEWAYS on the AIM printer for 
increased readability. 

My appreciation for AIM increased considerably 
when I saw it performing in this fashion. 

Without any further software work, the AIM 65 
coupled with some MTU hardware would seem 
ideally suited for duty in the laboratory, the 
classroom or most anywhere that a relatively low- 
cost graphics system can be justified. Assembling 
such a system turns out to be very easy. It can 
be performed by someone with moderate electronic 
skills and with totally "off-the-shelf components. 

But don't let your imagination stop here. Many 
other things can be done with such a display. How 
'bout a 16-channel digital logic analyzer? Very possible 
with a bit-mapped graphics display. 

Want to make your KIM, AIM, or SYM look 
like a PET? Simple. 

PET's screen is organized as 25 lines of 40 
characters each. Each of these characters is composed 
of an 8x8 dot matrix. Multiply 40 characters times 
8 bits (character width) and what do you get? Why 
320, of course. Then do the same with 25 lines 
times 8 bits and you get 200. 

So, when you break down PET's display to the 
dot level, the MTU and PET display are precisely 
the same. It is possible to generate all PET's 
graphic characters in software or design your own 
special purpose characters for that matter. 
Get the picture? 

The Apple and Atari can be simulated in pre- 
cisely the same fashion. Foreign language fonts are 
also possible. 

Normal X Y plotting subroutines are also in- 



38 



compute II. 



June/ July, I960. 



eluded in the MTU graphics software. 

You can get more information on these and other 
products from 

Micro Technology Unlimited 

P.O. Box 4596 

Manchester, NH 03108 

(603) 627-1464 

Sound Chip Update 

I finally got hold of some General Instruments 
Programmable Sound Generator chips (AY3-8910). 
One of them is residing on a prototype card along 
with a 6522, which interfaces the sound chip to my 
computer. 

After some initial problems (with me, not the 
chip) I was able to get the sound generator to start 
generating some sound. I haven't yet even scratched 
the surface of what's possible with the PSG-maybe 
you'll also hook one to your computer and see what 
sounds you can get out of it. 

In my next column, I'll write up the driver 
software to save you the trouble. 

Lately, my mind has also been racing with some 
of the possibilities for ways to input music into the 
system as well as output it. 

Hope For The OSI Users 

There may be hope for you OSI users yet. No, not 
from OSI but from a company called AARDVARK 
TECHNICAL SERVICES (1690 Bolton, Walled 
Lake, MI 48088 tel (313) 624-6316). 

They seem to have a really good attitude and 
sure have lots of low-cost game and utility soft- 
ware for CI and C2 system users. 

Their catalog says it all though with several 
BASIC program listings (including LIFE), at least 4 
pages of useful info on Microsoft BASIC and the 
OSI system besides the incredibly large catalog of 
program offerings. Well worth their asking price of 
$1. 

Remember the friend of mine who was working on 
using his C2-4P as a terminal for his new found 
love (a KIM-1)? Well, that story had a happy ending 
when he loaded in the dumb terminal program from 
AARDVARK and it worked perfectly the first time. 

Love those happy endings. © 




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June/ July, 1980. 



compute II. 



47 



Part 2: Implementing the IEEE-488 Bus on a SYM-1 

DESIGNING AN IEEE-488 
RECEIVER WITH THE SYM 



Larry Isaacs, COMPUTE. Staff 

This is the second part of an article describing 
the use of a SYM-1 to interface a PET to a Spin writer 
with a serial interface. We will continue to divide the 
more complex functions into simpler sub-functions 
when necessary. Once the sub-functions are simple 
enough, they will be implemented. In the first part, 
the interface was divided into four sub-functions: 
INIT, PRINT, CYCLE, and INTERFACE. Imple- 
mentations for PRINT and CYCLE have already been 
presented. Briefly, the PRINT routine handles the 
communication with the Spinwriter. By using the 
ETX/ACK protocol, the PRINT routine keeps the 
Spinwriter printing at its maximum speed. The 
CYCLE routine handles the handshaking necessary to 
transfer a byte from the IEEE 488 Bus to the SYM. 
For convenience, these routines are given again in the 
complete listing of the interface software found at 
the end of this article. Also, the hardware to connect 
the Spinwriter to the SYM is shown again in Figure 2. 

Before we can begin work on the INTER- 
FACE sub-function, we must first understand how the 
PET will try to communicate with the SYM using 
the IEEE 488 Bus. Now we will continue with a 
description of this communication procedure. 
Communicating On The IEEE 488Bus 
The next step is to become familiar with how the 
PET communicates on the IEEE Bus. This discussion 
will involve two more signal lines. These are the ATN 
(Attention) line and the EOI (End Or Identify) 
line. 

Each communication on the IEEE 488 Bus can be 
described as a sequence of three parts. In the first 
part the PET identifies which device it wishes to 
communicate with. In the second part it sends or 
receives the data. And finally in third part, the 
PET terminates the communication sequence. Each 
part makes use of the byte transfer cycle described 
previously to transfer information. However, the infor- 
mation transferred in the first and third parts is 
differentiated from the second by the state of the ATN 
line. During the first and third parts the ATN line 
is low, indicating that the bytes transferred should be 
treated as commands and not data. 

Here is a brief description of what happens during 
a communication sequence with a device, or devices, 
which only receives data, such as our printer. I 
will assume that prior to the beginning of the sequence, 
all devices on the bus are in the inactive state, i.e. 
the NRFD line is high. 



The sequence begins with the PET setting the 
ATN line low. This brings all operating devices on 
the bus to the active state. The PET now executes 
a byte transfer cycle sending the device address to 
each device. Only those devices whose device address 
matches the one sent by the PET will continue with 
the communication sequence. All other devices will 
return to the inactive state at the end of this first 
part. The Commodore printers use device address 
24 hex. The lower 5 bits contain the device number, 
in this case 4. The upper three bits, "001", indicate 
that the device is to receive data. A "010" in the 
upper three bits would indicate the device is to send 
data. Now the PET may end the first part by setting 
the ATN line high, or transfer another byte known as 
the secondary address before setting ATN high. The 
secondary address is used to address different functions 
or channels within the selected device. 

The second part consists of the required number 
of byte transfer cycles to transfer the data to the device. 
In most cases, the PET will signal that the last 
data byte is being transferred by setting the EOI 
line low during the last cycle. Because the EOI isn't 
always sent, it wouldn't be a reliable signal to use 
for determining the end of this part of the communica- 
tion sequence. 

For the third part, the PET sets the ATN line 
low again, and executes a byte transfer cycle which 
sends $3F hex to all active devices. This is the 
UNLISTEN command, which tells all listening devices 
to stop receiving data. 

One requirement for the interface which may not 
be obvious is that once the communication sequence 
has reached the second part, all commands except 
for the UNLISTEN command should be ignored. 
It would not be a violation of the IEEE 488 Bus 
Standard for the PET to activate a device which sends 
data at the same time as one which receives data, and 
have them communicate directly with each other. 

There is one other IEEE signal line which should 
be included in the interface. This is the IFC (Inter- 
face Clear) line. Whenever this line goes low, the 
interface should return to the inactive state. 

Now we are ready to deal with the hardware 
requirements for communicating on the IEEE Bus. We 
will be using 6522 #2 on the SYM for the necessary 
I/O signals since all of the I/O lines from both ports 
go to the A-A connector. If necessary, the 6522 
supplied as 6522 #3 could be moved to the #2 socket, 
losing only a few features which aren't needed for 



compute II. 



June/ July, 1980. 



this interface. The main hardware requirement con- 
cerns a requirement for the delay between ATN 
going low to the time when NRFD is set low by a 
device. The IEEE 488 Standard calls for a maximum 
of 200 nanoseconds for this delay. Though the PET 
can't operate this fast, it does operate too fast for 
the S YM to meet this requirement using just soft- 
ware. The solution to obtain the necessary speed is to 
selectively send the ATN signal back out the NRFD 
line. The SYM can then assume control of the NRFD 
line when it is ready. The only other hardware 
needed are a couple of open-collector gates for the 
Wire-or requirements of the NRFD and NDAC lines. 
The circuitry shown in Figure 1 will meet these re- 
quirements. 

Interface 

The main function of the INTERFACE sub-function 
is to handle the communication sequence for the IEEE 

Listing 4 

procedure INTERFACE 

procedure ATNIRQ begin ... end; {handles the IEEE communication} 
procedure IFCIRQ begin ... end; {resets the interface} 

begin {INTERFACE procedure} 
repeat 

if INTERRUPT=TRUE then 
begin 

if IRQ^ATN then ATNIRQ; 
if IRQ=IFC then IFCIRQ 
end 
until 2+2*5 {hopefully repeat forever} 
end; 

Bus. The first decision we must make is how the 
INTERFACE software will know when a communi- 
cation sequence has begun, or when the IFC line 
goes low. Since the IFC signal is supposed to reset 
the device regardless of its current state, this signal 
should be tied to an interrupt. For greater flexibility 
we will tie the ATN line to an interrupt as well. 
This will allow the SYM to do other things when 
not being used as an interface. 

The use of interrupts now provides a basis for 
dividing the INTERFACE sub-function into smaller 
parts. Listing 4 shows my division of the INTERFACE 
sub- function. 

At this point we are almost ready to write the 
assembly language for the remaining parts of the soft- 
ware. However, ATNIRQ needs one more division. 
This involves addressing the question of how much 
intelligence to put in the interface. One answer is 
to program ATNIRQ in a way that leaves the door 
open for expansion. This can be done easily using 
the secondary address to call different interface 
routines. The division for ATNIRQ is shown in 
Listing 5. The "case" statement in this listing is 
a multiway subroutine jump. If SECADDRS is when 
the "case" statement is executed, the SENDASCII 
procedure will be executed. For other secondary 
addresses, the DUMPCHRS procedure will be execu- 
ted. 



Listing 5 

procedure ATNIRQ 

procedure ATNINIT; begin . . 
procedure SENDASCII; begin 
procedure DUMPCHRS; begin . 



end; {get ready for communication} 
. . end; {input data and print it} 
. end; {ignore data} 



begin {ATNIRQ statements} 
CYCLE; {get device address} 
if DATA*MLA then 
begin 

ATNINIT; 

CYCLE; {get next byte, possibly a secondary address} 
if ATN* LOW then 
begin 

SECADDRS :■= DATA; 
CYCLE 
end; 
case SECADDRS of 

: SENDASCII; 
1..15 : DUMPCHRS; 
end {case statement} 
end {if statement} 
end; {ATNIRQ} 

Now we can write the assembly language for INIT, 
then IFCIRQ, and finally ATNIRQ. Not clearly 
shown by the preceeding PASCAL programs is how 
the machine language should actually handle the 
interrupts. After an interrupt occurs, the first 
thing the machine language must do is save the register 
contents. Then it must test to see what interrupt 
occured. If it was an ATN interrupt, then the current 
stack pointer must be saved and ATN interrupts dis- 
abled before continuing with the rest of the ATNIRQ 
routine. If the interrupt was an IFC interrupt, the 
IFCIRQ routine should test to see if the ATNIRQ 
routine was executing. If it was, the IFCIRQ 
routine must restore the stack pointer to the value 
saved by ATNIRQ and reenable the ATN interrupt 
before restoring the registers and returning to the 
interrupted program. 

The full listing of the assembly language for the 
interface is given in Listing 6. I've tried to write 
the assembly language so it can be easily expanded. 
Just remember that when you put a different routine 
in SCTABLE, the first data byte will have already 
been fetched by CYCLE when your routine is entered. 

Summary 

I've tried to make this article as much an example 
of interface design as one describing an actual inter- 
face. Most of the material presented dealt with needed 
facts or the steps involved in reaching a solution. I 
do not wish to imply that designing an interface 
should proceed from start to finish as easily as this 
article makes it seem. It is very likely that during your 
design, you will come upon a piece of new information 
or see a different approach which would have been 
highly useful at some previous step. This occured a 
few times during this design. Sometimes it is necessary 
or perhaps desireable to return to that previous step 
and take a different path. However, if you do enough 
preparation and planning before you begin the design 
process, you shouldn't have to backup too many times. 



June/ July, 1980. 



compute II. 



49 



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• KIM-1* HARDWARE COMPATIBILITY %*- 
The powerful 6502 8-Bit MICROPROCESSOR whose advanced 
architectural features have made it one of the largest selling "micros" 
on the market today. 

» THREE ON-BOARD PROGRAMMABLE INTERVAL TIMERS available to 

the user, expandable to five on-board. 
» 4K BYTE.ROM RESIDENT MONITOR and Operating Programs. 
' Single 5 Volt power supply is all that is required. 

• IK BYTES OF 2114 STATIC RAM onboard with sockets provided for 
immediate expansion to 4K bytes onboard, with total memory expan- 
sion to 65, 536 bytes. 

USER PROM/ROM: The system is equipped with 3 PROM/ROM ex- 
pansion sockets for 2316/2332 ROMs or 2716 EPROMs 
ENHANCED SOFTWARE with simplified user interface 
STANDARD INTERFACES INCLUDE: 
— Audio Cassette Recorder Interface with Remote Control (Two 

modes: 135 Baud KIM-1* compatible, Hi-Speed 1500 Baud) 
— Full duplex 20mA Teletype Interface 
— System Expansion Bus Interface 
— TV Controller Board Interface 
—CRT Compatible Interface (RS-232) 

APPLICATION PORT: 15 Bi-directional TTL Lines for user applications 
with expansion capability for added lines 

EXPANSION PORT FOR ADD-ON MODULES (51 I/O Lines included in 
the basic system) 

SEPARATE POWER SUPPLY connector for easy disconnect of the d-c 
power 
AUDIBLE RESPONSE KEYPAD 




Synertek has enhanced KIM-1 * software as well as the hardware. The 
software has simplified the user interface. The basic SYM-1 system is 
programmed in machine language. Monitor status is easily accessible, 
and the monitor gives the keypad user the same full functional capabili- 
ty of the TTY user. The SYM-1 has everything the KIM-1* has to offer, 
plus so much more that we cannot begin to tell you here. So, if you want 
to know more, the SYM-1 User Manual is available, separately. 
SYM-1 Complete w/manuals $229.00 

SYM-1 User Manual Only 7.00 

SYM-1 Expansion Kit 60.00 

Expansion includes 3K of 21 14 RAM chips and 1-6522 I/O chip. 
SYM-1 Manuals: The well organized documentation package is com- 
plete and easy-to-understand. 

SYM-1 CAN GROW AS YOU GROW. It's the system to BUILD-ON. 
Expansion features that are available: 

BAS-1 8K Basic ROM (Microsoft) $ 89.00 



KTM-2 (Complete terminal less monitor) 319.00 

QUALITY EXPANSION BOARDS DESIGNED SPECIFICALLY FOR KIM-1 , SYM-1 & AIM 65 

These boards are set up for use with a regulated power supply such as the one below, but, provisions have been made so that you can add 

onboard regulators for use with an unregulated power supply. But, because of unreliability, we do not recommend the use of onboard 

regulators. All I.C.'s are socketed for ease of maintenance. All boards carry full 90-day warranty. 

All products that we manufacture are designed to meet or exceed industrial standards. All components are first qualtiy and meet full 

manufacturer's specifications. All this and an extended burn-in is done to reduce the normal percentage of field failures by up to 75%. To you, 

this means the chance of inconvenience and lost time due to a failure is very rare; but, if it should happen, we guarantee a turn-around time of 

less than forty-eight hours for repair. 

Our money back guarantee: If, for any reason you wish to return any board that you have purchased directly from us within ten (10) days after 

receipt, complete, in original condition, and in original shipping carton; we will give you a complete credit or refund less a $10.00 restocking 

charge per board. 



VAK-1 8-SLOT MOTHERBOARD 

This motherboard uses the KIM-4* bus structure. It provides eight (8) 
expansion board sockets with rigid card cage. Separate jacks for audio 
cassette, TTY and power supply are provided. Fully buffered bus. 
VAK-1 Motherboard $129.00 

VAK-2/4 16K STATIC RAM BOARD 

This board using 2114 RAMs is configured in two (2) separately 
addressable 8K blocks with individual write-protect switches. 

VAK-2 16K RAM Board with only $239.00 

8K of RAM ( K populated) 
VAK-3 Complete set of chips to 125.00 

expand above board to 16K 
VAK-4 Fully populated 16K RAM 325.00 

VAK-5 2708 EPROM PROGRAMMER ~ "" """""" "" 

This board requires a +5 VDC and + 12 VD C Dut nas a DC to DC 



multiplyer so there is no need for an additional power supply. All 

software is resident in on-board ROM, and has a zero-insertion socket. 

VAK-5 EPROM Programmer w/2708 adapter $249.00 

VAK-5A Single voltage 2716 adapter 45.00 

VAK-6 EPROM BOARD 

This board will hold 8K of 2708 or 2758, 
EPROMs. EPROMs not included. 
VAK-6 EPROM Board 



or 16K of 2716 or 2516 
$119.00 



VAK-7 COMPLETE FLOPPY-DISK SYSTEM (Oct 79) 

VAK-8 PROTYPING BOARD 

This board allows you to create your own interfaces to plug into the 
motherboard. Etched circuitry is provided for regulators, address and 
data bus drivers; with a large area for either wire-wrapped or soldered 
IC circuitry. 

VAK-8 Protyping Board $39.00 



POWER SUPPLIES 

ALL POWER SUPPLIES are totally enclosed with grounded enclosures for safety, AC power cord, and carry a full 2-year warranty. 
FULL SYSTEM POWER SUPPLIES 



This power supply will handle a microcomputer and up to 65K of our 
VAK-4 RAM. ADDITIONAL FEATURES ARE: Over voltage Protection on 5 
volts, fused, AC on/off switch. Equivalent to units selling for $225.00 or 
more. 
Provides +5 VDC @ 10 Amps & ±12 VDC @ 1 Amp 

VAK-EPS Power Supply $11 9.00 

VAK-EPS/AIM provides the same as VAK-EPS plus 24V 
unreg. 149.00 

\ \ "^^^ *KIM is a product of MOS Technology 



KIM-1 * Custom P.S. provides 5 VDC ( 
and +12 VDC@.1 Amps 
KCP-1 Power Supply 



1.2 Amps 



$39.00 



SYM-1 Custom P.S. provides 5 VDC ( 
VCP-1 Power Supply 



1.4 Amps 



$39.00 



J)RNB> ENTERPRISES 



§Q 




*g* 



INCORPORATED 



2967 W. Fairmount Avenue 
Phoenix AZ. 8501 7 
(602)265-7564 

Add $2.50 for shipping and handling per order. 



so 












compute II. 


June/ July, 1980. 














0010 


; IEEE INTERFACE 














0020 


; WITH HARDWARE 














0030 


; VERSION 


2.5 
















0040 




















0050 


; CONSTANTS 
















0060 


UNLISTEN 


.DE 


$3F 














0070 


BS 


.DE 


$08 














0080 


UNDLN 


.DE 


$5F 














0090 


LF 


.DE 


$0A 














0100 


COLON 


.DE 


$3A 














0110 


SPACE 


.DE 


$20 














0120 


COMMA 


.DE 


$2C 














0130 


CR 


.DE 


$0D 














0140 


• 


















0150 


; VARIABLES 
















0160 


COUNT 


.DE 


$E0 














0170 


SIGNALS 


.DE 


$E1 














0180 


DATA 


.DE 


$E2 














0190 


MLA1 


.DE 


$E3 














0200 


SEC.ADDRS 


.DE 


$E4 














0210 


TEMP 


.DE 


$E5 














0220 


LENGTH 


.DE 


$E6 














0230 


NL.FLAG 


.DE 


$E7 














0240 


SCAN.CNT 


.DE 


$E8 














0250 


F.LEN 


.DE 


$E9 














0260 


SP.IEEE 


.DE 


$EA 














0270 


• 


















0280 


; ADDRESSES 
















0290 


ACCESS 


.DE 


$8B86 














0300 


TOUFL 


.DE 


$A654 














0310 


SDBYT 


.DE 


$A651 














0320 


TECHO 


.DE 


$A653 














0330 


OUTCHR 


.DE 


$8A47 














0340 


INCHR 


.DE 


$8A58 














0350 


CRLF 


.DE 


$834D 














0360 


TOUT 


.DE 


$8AA0 














0370 


@2ACR 


.DE 


$A80B 














0380 


@2DDRA 


.DE 


$A803 














0390 


@2DDRB 


.DE 


$A802 














0400 


@2PCR 


.DE 


$A80C 














0410 


@2IER 


.DE 


$A80E 














0420 


@2I0RB 


.DE 


$A800 














0430 


@2I0RA 


.DE 


$A801 














0440 


@2IFR 


.DE 


$A80D 














0450 


OUTVEC 


.DE 


$A663 














0460 


UIRQVC 


.DE 


$A678 














0470 


IND.JMP 


.DE 


$EE 














0480 


• 


















0490 




.BA 


$200 






0200- 


20 


86 


8B 


0500 


INIT 


JSR 


ACCESS ; INITIALIZATION 






0203- 


A9 


24 




0510 




LDA 


#$24 






0205- 


85 


E3 




0520 




STA 


*MLA1 ;MY LISTEN ADDRESS 






0207- 


A9 


90 




0530 


INIT.SYM 


LDA 


#$90 






0209- 


8D 


54 


A6 


0540 




STA 


TOUFL ; ENABLE CRT 






020C- 


A9 


10 




0550 




LDA 


#$10 






020E- 


8D 


51 


A6 


0560 




STA 


SDBYT ;SET FOR 1200 BAUD 






0211- 


A9 


00 




0570 




LDA 


#$00 






0213- 


8D 


53 


A6 


0580 




STA 


TECHO ; OUTPUT & NO ECHO 






0216- 


A9 


A0 




0590 




LDA 


#L f TOUT ;SET OUTPUT VECTOR 






0218- 


8D 


64 


A6 


0600 




STA 


OUTVEC+$l 





June/ July, 1980. 






compute II. 


51 


021B- A9 8A 


0610 




LDA #H,TOUT 




021D- 8D 65 A6 


0620 




STA 0UTVEC+$2 


0220- A9 53 


0630 




LDA #L, INTERFACE 


0222- 8D 78 A6 


0640 




STA UIRQVC 


;SET USER IRQ VECTOR 


0225- A9 02 


0650 




LDA #H, INTERFACE 


0227- 8D 79 A6 


0660 




STA UIRQVC+$] 




022A- A9 02 


0670 




LDA #$02 




022C- 85 E0 


0680 




STA * COUNT 




022E- A9 00 


0690 INITPORTS 


LDA #$00 




0230- 8D 0B A8 


0700 




STA @2ACR 


; NO LATCHING 


0233- 8D 03 A8 


0710 




STA @2DDRA 


;2PA7-2PA0 ARE INPUTS 


0236- A9 07 


0720 




LDA #$07 




0238- 8D 02 A8 


0730 




STA @2DDRB 


;3PB2-3PB0 ARE OUTPUTS 


023B- A9 04 


0740 




LDA #$04 




023D- 8D 0C A8 


0750 




STA @2PCR 


; INTERRUPTS 


0240- 20 47 02 


0760 




JSR EN. IEEE 


; ENABLE IRQS 


0243- 58 


0770 




CLI 




0244- 4C 44 02 


0780 IDLE 
0790 ; 
0800 ; 




JMP IDLE 


;WAIT REAL FAST 


0247- 78 


0810 EN. IEEE 


SEI 




0248- A9 83 


0820 




LDA #$83 


; ENABLE ATN AND IFC 


024A- 8D 0E A8 


0830 




STA @2IER 


; INTERRUPTS 


024D- A9 06 


0840 




LDA #$06 




024F- 8D 00 A8 


0850 




STA @2I0RB 


;NDAC=1,NRFD=ATN 


0252- 60 


0860 
0870 ; 
0880 ; 




RTS 




0253- 48 


0890 INTERFACE 


PHA ;SAVE REGISTERS 


0254- 98 


0900 




TYA 




0255- 48 


0910 




PHA 




0256- 8A 


0920 




TXA 




0257- 48 


0930 




PHA 




0258- AD 0D A8 


0940 




LDA @2IFR 




025B- 10 ID 


0950 




BPL EXIT.INTF 




025D- 29 03 


0960 IEEE, 


.IRQ 


AND #$03 


; WHICH INTERRUPT? 


025F- C9 01 


0970 




CMP #$01 




0261- F0 ID 


0980 




BEQ ATN.IRQ 




0263- C9 02 


0990 




CMP #$02 




0265- F0 03 


1000 




BEQ IFC. IRQ 




0267- 4C 7A 02 


1010 




JMP EXIT.INTF 




026A- AD 01 A8 


1020 ifc; 


[RQ 


LDA @2I0RA 


; CLEAR INTERRUPT 


026D- A9 01 


1030 




LDA #$01 




026F- 2C 0E A8 


1040 




BIT @2IER 


;IEEE ACTIVE? 


- 0272- D0 06 


1050 




BNE EXIT.INTF 


;EXIT INTERFACE 


0274- A6 EA 


1060 IEEE. 


,OFF 


LDX *SP.IEEE 




0276- 9A 


1070 




TXS /RESTORE 


STACK POINTER 


0277- 20 47 02 


1080 




JSR EN. IEEE 




027A- 68 


1090 EXIT. 


,INTF 


PLA 




027B- AA 


1100 




TAX 




027C- 68 


1110 




PLA 




027D- A8 


1120 




TAY 




027E- 68 


1130 




PLA 




027F- 40 


1140 
1150 ; 
1160 ; 




RTI 




0280- BA 


1170 ATN.IRQ 


TSX 




0281- 8E EA 00 


1180 




STX SP.IEEE ; 


SAVE STACK POINTER 


0284- AD 01 A8 . 


1190 ATNINIT 


LDA 02IORA ; 


CLEAR INTERRUPT 


0287- A9 05 


1200 




LDA #$05 





52 














compute II. 


June/ July, 1»$0. 


0289- 


8D 


00 


A8 


1210 




STA 


@2I0RB 


;SET NDAC=0 NRFD=0 


028C- 


A9 


01 




1220 




LDA 


#$01 




028E- 


8D 


00 


A8 


1230 




STA 


@2I0RB 


;TURN OFF ATN=NRFD 


0291- 


8D 


0E 


A8 


1240 




STA 


@2IER 


;TURN OFF ATN IRQS 


0294- 


58 






1250 




CLI 






0295- 


A9 


00 




1260 




LDA 


#$00 




0297- 


85 


E4 




1270 




STA 


♦SEC.ADDRS ;INIT SEC. ADDRS 


0299- 


20 


EF 


02 


1280 




JSR 


CYCLE 




029C- 


A5 


E2 




1290 




LDA 


*DATA 




029E- 


C5 


E3 




1300 




CMP 


*MLA1 




02A0- 


F0 


0C 




1310 




BEQ 


DEVICEl 


; BRANCH IF MY ADDRESS 


02A2- 


A9 


02 




1320 


EXIT. IEEE 


LDA 


#$02 




02A4- 


8D 


00 


A8 


1330 




STA 


@2I0RB 


; RELEASE ATN=NRFD 


02A7- 


-»2C 


00 


A8 


1340 


@15 


BIT 


@2I0RB 




02AA- 


30 


FB 




1350 




BMI 


@15 


;WAIT FOR ATN=1 


02AC- 


10 


BC 




1360 
1370 


• 


BPL 


IFC.IRQ 


;BR ALWAYS 


02AE- 


20 


EF 


02 


1380 


DEVICEl 


JSR 


CYCLE 




02B1- 


24 


El 




1390 




BIT 


* SIGNALS 


; SECONDARY ADDRESS? 


02B3- 


10 


09 




1400 




BPL 


@3 


; BRANCH IF ATN IS OFF 


02B5- 


A5 


E2 




1410 




LDA 


*DATA 


;GET SECONDARY ADDRESS 


02B7- 


29 


0F 




1420 




AND 


#$0F 


; ALLOW 16 SEC. ADDRS 'S 


02B9- 


85 


E4 




1430 




STA 


*SEC. ADDRS 


02BB- 


20 


EF 


02 


1440 




JSR 


CYCLE 


;GET FIRST CHAR. 


02BE- 


A5 


E4 




1450 


@3 


LDA 


*SEC. ADDRS 


02C0- 


0A 






1460 




ASL 


A 




02C1- 


AA 






1470 




TAX 






02C2- 


BD 


CF 


02 


1480 




LDA 


SCTABLE f X 


;FIX POINTER TO 


02C5- 


85 


EE 




1490 




STA 


*IND.JMP 


; SELECTED ROUTINE 


02C7- 


BD 


D0 


02 


1500 




LDA 


SCTABLE+$l f X 


02CA- 


85 


EF 




1510 




STA 


*IND.JMP+$1 


02CC- 


6C 


EE 


00 


1520 




JMP 


(IND.JMP) 




02CF- 


37 


03 




1530 


SC TABLE 


.SI 


SENDASCII 


; NORMAL PRINTING 


02D1- 


47 


03 




1540 




.SI 


DUMPCHRS 




02D3- 


47 


03 




1550 




.SI 


DUMPCHRS 




02D5- 


47 


03 




1560 




.SI 


DUMPCHRS 




02D7- 


47 


03 




1570 




.SI 


DUMPCHRS 




02D9- 


47 


03 




1580 




.SI 


DUMPCHRS 




02DB- 


47 


03 




1590 




.SI 


DUMPCHRS 




02DD- 


47 


03 




1600 




.SI 


DUMPCHRS 




02DF- 


47 


03 




1610 




.SI 


DUMPCHRS 




02E1- 


47 


03 




1620 




.SI 


DUMPCHRS 




02E3- 


47 


03 




1630 




.SI 


DUMPCHRS 




02E5- 


47 


03 




1640 




.SI 


DUMPCHRS 




02E7- 


47 


03 




1650 




.SI 


DUMPCHRS 




02E9- 


47 


03 




1660 




.SI 


DUMPCHRS 




02EB- 


47 


03 




1670 




.SI 


DUMPCHRS 




02ED- 


47 


03 




1680 
1690 
1700 


■ 
t 

• 

r 


.SI 


DUMPCHRS 




02EF- 


A9 


03 




1710 


CYCLE 


LDA 


#$03 




02F1- 


8D 


00 


A8 


1720 




STA 


@2 IORB 


;NRFD=1 NDAC=0 


02F4- 


2C 


00 


A8 


1730 


§1 


BIT 


@2 IORB 


;TEST DAV 


02F7- 


70 


FB 




1740 




BVS 


ei 


; BRANCH IF DAV=1 


02F9- 


6A 






1750 




ROR 


A 




02FA- 


8D 


00 


A8 


1760 




STA 


@2 IORB 


;NRFD=0 NDAC=0 


02FD- 


AD 


01 


A8 


1770 




LDA 


@2I0RA 




0300- 


49 


FF 




1780 




EOR 


#$FF 




0302- 


85 


E2 




1790 




STA 


*DATA 




0304- 


AD 


00 


A8 


1800 




LDA 


@2I0RB 





June/ July, 19SO. 



compute II. 



53 



0307- 
0309- 
030B- 
030E- 
0311- 
0313- 
0315- 
0318- 
0319- 
031C- 
031E- 
0320- 
0322- 
0325- 
0328- 
032A- 
032C- 



032D- 
032F- 
0331- 
0334- 
0337- 
0339- 
033B- 
033D- 
033F- 
0341- 



0344- 
0347- 
0349- 
034B- 
034D- 
034F- 
0351- 
0354- 



85 El 
A9 00 
8D 00 A8 
2C 00 A8 
50 FB 
A9 01 
8D 00 A8 
60 

20 47 8A 
E6 E0 
D0 0C 
A9 03 
20 47 8A 
20 58 8A 
A9 02 
85 E0 
60 



A5 E2 
29 7F 
20 19 03 
20 EF 02 
24 El 
10 F2 
A5 E2 
C9 3F 
D0 F3 
4C A2 02 



20 EF 02 
24 El 
10 F9 
A5 E2 
C9 3F 
D0 F3 
4C A2 02 
00 



1810 

1820 

1830 

1840 @2 

1850 

1860 

1870 

1880 

1890 PRINT 

1900 

1910 

1920 ACK 

1930 

1940 

1950 

1960 

1970 RETURN 

1980 ; 

1990 ; 

2000 @18 

2010 

2020 

2030 NEXT 

2040 SENDASCII 

2050 

2060 

2070 

2080 

2090 

2100 ; 

2110 ; 

2120 NEXT2 

2130 DUMPCHRS 

2140 

2150 

2160 

2170 

2180 

2190 

2200 



STA *SIGNALS 
LDA #$00 
STA @2I0RB 
BIT @2I0RB 
BVC @2 
LDA #$01 
STA @2I0RB 
RTS 

JSR OUTCHR 
INC *COUNT 
BNE RETURN 
LDA #$03 
JSR OUTCHR 
JSR INCHR 
LDA #$02 
STA *COUNT 
RTS 



LDA *DATA 
AND #$7F 
JSR PRINT 
JSR CYCLE 
BIT *SIGNALS 
BPL @18 
LDA *DATA 
CMP #UNLISTEN 
BNE NEXT 
JMP EXIT. IEEE 



JSR CYCLE 
BIT *SIGNALS 
BPL NEXT2 
LDA *DATA 
CMP #UNLISTEN 
BNE NEXT2 
JMP EXIT. IEEE 
.BY $0 
.EN 



;NRFD=0 NDAC=1 

; BRANCH IF DAV=0 

;NRFD=0 NDAC=0 

; PRINT AND INC. COUNT 



; ASCI I ETX 
;WAIT FOR ACK 



;BR IF ATN=1 



SYM to Spinwriter Hardware 

SYM T CONNECTOR RS232 CONNECTOR 

GND 

TRANSMIT 

RECEIVE 

CLEAR TO SEND 

DATA SET READY 

GND 

CARRIER DETECT 



Editor's Note: For those of you who don 't have issue 1, we're 
reprinting these two charts. RCL 



1 




1 


2 
3 

5 




2 
3 






5 


6 

7 




6 
7 




8 




8 





TABLE, 1 

NAME SET BY 

DI01- Talker 

DI08 
NRFD Listener 



DAV Talker 

NDAC Listener 

ATN Talker 

EOI Talker 
IFC 



DESCRIPTION 

Data Input/Output. These lines carry the 

commands and data. 

Not Ready for Data. When low, it means 

the device is not ready to receive data. It 

is set high when the device is ready. 

Data Valid. When high, it means the data 

on the data lines is not valid. It is set low 

once all NRFD goes high and valid data 

has been placed on the data lines. 

Not Data Accepted. When low, it means 

that the data has not been accepted. It 

is set low once DAV goes low and the 

data has been latched. 

Attention. Signals that the byte on the 

DIO lines is a command. 

End Or Identify. Signals that the last 

data byte is being transferred. 

Interface Clear. Resets all devices. 



54 



compute II. 



June/ July, I960. 



Figure 1 



2PA7 
2PA6 
2PA5 
2PA4 
2PA3 
2PA2 
2PA1 
2PA0 



AA 

U 
M 

11 

N 

12 

C 

3 

D 



2CA2 
2PB7 



*- 
*- 



2PB2 



2PB1 



K 




74LS00 



74lsoo i ' » ' 

74LS00 74LS03 




IEEE 



15 

11 

7 

3 

13 

9 

5 

1 



25 



19 



DI08 
DI07 
DI06 
DI05 
DI04 
DI03 
DI02 
DI01 



ATN 



NRFD 



2PB6 



H 



17 



NDAV 



2PB0 

2PB5 
2CA1 



7 
E 



13 



12 



> 



74LS03 



21 

27 
23 



NDAC 

EOI 
IFC 



June/ July, 1980. 



compute II. 



55 



SYM High 
Speed Tape 



Gene Zumchak 

The SYM has two different tape formats, the low speed 
or KIM format, and its own high speed format that 
can handle 185 bytes per second, which is not bad 
at all . . . if it works. The high speed format has given 
problems from the beginning. The new SYM monitor, 
version 1 . 1 was changed significantly in the tape 
routines to overcome the early problems. Also, newer 
SYMs use a different bias network on the tape input 
comparator and a fatter (.22 mfd) input coupling capa- 
citor (CI 6). (Synertek advises that a few users have 
improved their tape reads by reducing C16, a typical 
value being .05 mfd.) 

If you have an early SYM and still use the origi- 
nal version 1.0 monitor you won't be able to benefit 
from this discussion. I recommend very strongly that 
you obtain the new monitor. It's available from SYM 
Users Group, P.O. Box 315, Chico, CA 95927, for 
$16, and includes the resistor mod kit. 

Nevertheless, even if you have the hardware mods 
and the new monitor, there is no guarantee that you 
will get reliable tape reading. The differences in success 
appear to be most affected by the tape recorder. Often- 
time a cheap discount store recorder will give good 
results when a more expensive name brand unit will 
not. Frequency response of the recorder does not 
seem to be a criterion for predicting success. The 
SYM high speed format, and most high speed tech- 
niques depend upon measuring the time interval be- 
tween transitions on the tape. Misinterpret one transi- 
tion time and it's all over. The transitions are put 
on the tape very accurately. However, when the tape 
is played back, the high frequency components may 
experience significant phase shifting, affecting the 
zero crossing positions. Thus the high frequency 
shifting, and not so much the frequency response, 
appears to be the culprit. Fortunately, the new SYM 
monitor has some variables built into the tape routines 
that allow you to " tweak" the tape read/write pro- 
grams to accomodate your recorder. These variables 
are shown in the accompanying figure, reproduced by 
permission of Synertek. 

In the SYM format, the bit period is constant. 
A "one" is two transitions per bit period, and a 
"zero" is one transition per bit period. In the origi- 
nal monitor, the two intervals for the one were symme- 
tical. In the new monitor, however, the first interval, 
(the only one measured) is narrower than the second, 
making it easier to distinguish between a short period 
(one) and a long period (zero). The intervals are speci- 
fied by variables TAPET1 and TAPET2 which are 



initilized by reset to $33 and $5A respectively. These 
numbers represent a number of 5-microsecond inter- 
vals. Thus each bit time is $8D (141 dec.) intervals or 
705 microseconds. The transition time interval is 
measured by starting the 6532 timer at $FF, counting 
down with the divide by eight clock. When a transition 
is detected, the value originally in location $A632 = 
HSBDRY (High Speed BounDRY) is added to the 
value from the timer. If the interval was short, the 
counter will not have counted down very far from 
$FF and adding HSBDRY will result in a carry which 
is interpreted as a "one-bit" transition. Thus the 
ability to distinguish between a one and a zero depends 
upon how carefully we choose the high speed boundary 
value. The default value of $46 (70 decimal) gives 
a boundary time of 70 x 8, or 560 microseconds. 
Synertek arrived at this value experimentally by trying 
several popular recorders. There is no guarantee that 
this value is ideal for your recorder. To split the 
difference between the short and long transitions 
would give an " ideal" boundary of 255 + 225, or 
480 microseconds, or 60 ($3C) 8-microsecond inter- 
vals. If your recorder is closer to the ideal response, 
the default value of 560 microseconds will cause slightly 
narrow zero intervals to be interpreted as ones giving a 
bad reading. Before I took a look at the numbers, I 
experimentally determined the value of HSBDRY for 
my Panasonic recorder to be about $3C. Actually 
there was quite a range from $40 down to $39, but 
HSBDRY definitely needed to be smaller. Interesting- 
ly, I still can load tapes only over a very narrow range 
of volume settings. 

If indeed it is the phase shifting of high fre- 
quency components that affects zero crossings, then 
perhaps low-pass filtering the tape output before it 
goes onto the tape would improve performance. Then 
again, I do need the tone control as high as it will 
go to give best results. It would seem that with the 
diode clipping at the input of the comparator, the 
tape read would be relatively insensitive to amplitude, 
with a high volume being ideal. However, with my 
SYM that is not the case. Clearly, a great deal of 
experimenting can be done pre-filtering tape dump 
output before it is recorded, and conditioning the 
playback output before it is decoded. 

So far we have discussed only changing the value 
of HSBDRY to improve our read capability. However, 
the tape dump parameters TAPET1 and TAPET2 can 
also be modified. To generate SYM compatible tape, 
their values should not be changed radically, and their 
sum should equal $8D. On the other hand, if the sum 
is changed, the bit time and the corresponding number 
of bytes per second will change. We can make the 
tape speed faster or slower, and still read it back 
with the regular SYM programs by changing 
HSBDRY correspondingly. Just for kicks, I made 
TAPET1 $22 and TAPET2 $46, and was able to get 
fairly reliable loads with HSBDRY $30. This is a 
byte rate of approximately 250 bytes per second. It 
may be possible to double the SYM's high speed rate 



56 



compute II. 



June/ July, 198Q. 



J 



r 



(Old HON) 



■ 705 ps.- 



"0" (Old and New Won) 



• 255 ps.~ 

TAPET1 



(New MON) 



■ 450 ps. 

TAPET2 



560 ps. 

HSBDRY 



J 



255 ps. 



225 ps.~ 



480 \ys. 



225 ps.- 



" I deal" HSBDRY 

NAME LOCATION DEFAULT VALUE 

HSBDRY $A632 $46 (70 dec.) 350 ps. 
TAPET1 SA635 $33 (51 dec.) 255 ps. 
TAPET@ $A63C $5A (90 dec.) 450 ps. 



and still get good loads. The important thing, how- 
ever, is to get reliable loads at the regular high 
speed. 

Unfortunatley, there are still a number of problem 
sources that have nothing to do with SYM hard- 
ware and software. You may be using a bad tape. 
Your recorder may be excessively noisy, or generate 
motor noise. You might suspect the latter if the 
Sync display indication occasionally flickers even when 
set at the optimum volume setting. Sometimes a capa- 
citor (.05 to .lmfd) from the input of the compari- 
tor (pin 3) to ground will solve this problem. To 
help find other problem sources, a list of guide- 
lines, provided by Synertek, are reproduced at the 
article's end. 

In summary, SYMMERs still having problems 
with tape loading and using the new monitor may only 
need to adjust the value of HSBDRY (3A632), 
thanks to Synertek' s forsight in making the tape 
parameters variables. Remember, however, that this 
value, and all system RAM is initialized by RESET 
and will have to be fixed after each Reset. 

There is certainly a lot of experimentation that 
can be done on the SYM high speed tape reading 
and writing. I hope that the information in this 
brief article will inspire other SYMMERs to do some 
investigation. I'm sure that others besides myself 
will want to hear about any discoveries you make. 



Twenty Important Cassette 
Recording Guidelines 

Reprinted by permission of Synertek Systems Corp. ©1979 Synertek 
Systems Corp. 

1. Use high quality tape (Maxell UD or equivalent). 

2. Use shortest tapes possible. You can shorten tapes 

to several minutes in length if you enjoy splicing. 

3. Use shielded cable between your computer and the 

cassette recorder. 

4. Keep heads and pinch rollers clean. 

5. Keep heads aligned for tape interchangability. 

6. Avoid recording too close to beginning of tape. 

7. Make sure cassette is properly seated in recorder. 

8. If you have trouble with a cassette try another. 

You can have a bad spot on tape or a warped 
cassette. 

9. Highest setting of tone control is usually best. 

10. A dirty recorder volume control can cause tape 

dropouts. 

1 1 . Make sure cassette connection plugs make good 

contact. 

12. Rewind cassettes before removing them from 

recorder. 

13. Store cassettes in dust-proof containers. 

14. Avoid exposing cassettes to heat or magnetic 

fields. 

15. Before recording, wind cassette to one end and 

fully rewind. 

16. Cassette recorders will give you problems once in 

a while (They don't like certain cassettes, etc.). 
If one gives you problems most of the time re- 
place it. 

17. Make sure that MIKE plug is connected before 

recording. On most recorder the TAPE light 
will glow while recording. 

18. You may have to record with the EAR plug 

out for some tape recorders. 

19. Always use AC adaptor with recorder for best 

results. 

20. When a tone control is available, adjust it to the 

highest possible setting (maximum treble). Q 



June/ July, 1980. 



compute II. 



57 



KIM Rapid 
Memory Load/ 
Dump Routine 



Bruce Nazarian 
1007 Wright Street #3 
Ann Arbor, Ml 48105 

This routine works well for mass entering of stuff like 
long programs from a hex dump or similar, where 
you can tell at a glance where any errors in your 
entries are. A few words of additional explanation 
about it: 

For those users who would rather have a Carriage 
Return activate the address entry portion and the 
associated functions, substitute ASCII CR ($0D) at 
location $010E. This will do the trick and is the 
same as Markus Goenner's function from his TTY 
load routine from K.U.N. Thanks go to him for the use 
of some of his programming techniques. 

The directions also indicate that the program will 
list until it senses a key pressed at the end of a 
line. This is true, but the user should only use one 



of the DATA keys on the keypad, not ST or RS. 

Finally, the routine will only indicate the stopped 
address after the user commands RUBOUT thru his 
terminal. Then the KIM monitor will print the current 
pointer, which will be the address where it stopped 
dumping. 

If you want the routine to present one line of 
hex at a time, and wait on a key depression before 
looping back again and printing another line, make 
this change: 

0147 20 6A IF JSR KEYIN (Instead of the getkey 

subroutine) 
014A DO FB BNE 0147 
014C EA EA NOP's to fill previous coding 



0100 










ORG $0100 




0100 


D8 






ENTER 


CLD 


Clear decimal mode 


0101 


A9 


00 






LDA #$00 


Zero out the input buffers 


0103 


85 


F8 






STA INL 


Low 


0105 


85 


F9 






STA INH 


And High. . . . 


0107 


20 


2F 


IE 




JSR CRLF 


Use KIM Subroutine to send functions 


010A 


20 


5A 


IE 


ADDR 


JSR GETCH 


Input one character. . (of starting addr) 


010D 


C9 


20 






CMP #$20 


Check for go ahead.. (Insert 0D for CR) 


010F 


F0 


05 






BEQ DATA 


If yes, load address from buff in pointer. 


0111 


20 


AC 


IF 




JSR PACK 


If no, load character into INL, INH 


0114 


F0 


F4 






BEQ, ADDR 


...and loop back again 


0116 


20 


CC 


IF 


DATA 


JSR OPEN 


Move INL.INH, to POINTL.POINTH.. 


0119 


20 


2F 


IE 


DECIDE 


JSR CRLF 


(Saves bytes, doesn't it?) 


one 


20 


5A 


IE 


INPUT 


JSR GETCH 


Now input some Hex for the code... 


011F 


C9 


4C 






CMP #$4C 


'L' (Load memory)? 


0121 


F0 


2E 






BEQ. LOAD 


Yes, branch to LOAD portion (0151) 


0123 


C9 


51 






CMP #$51 


'Q' (Dump from memory)? 


0125 


DO 


F5 






BNE INPUT 


No, ignore invalid characters; Loop.. 


0127 


A9 


OF 




DUMP 


LDA #$0F 


Set up byte counter (16 decimal) 


0129 


8D 


7F 


01 




STA COUNT 


stick it in $01 7F 


012C 


20 


2F 


IE 




JSR CRLF 


New line, please.. 


012F 


20 


IE 


IE 




JSR PRTPNT 


Output the current pointer address 


0132 


20 


9E 


IE 




JSR OUTSP 


...and space it... 


0135 


20 


9E 


IE 


GET 


JSR OUTSP 


...again... 


0138 


A0 


00 






LDY #$00 


Set up Y-Register for Indirect addressing 


013A 


Bl 


FA 






LDA (POINTL).Y Load contents of pointed address 


013C 


20 


3B 


IE 




JSR PRTBYT 


...and print as two hex digits... 


013F 


20 


63 


IF 




JSR INCPT 


Increment the double-byte pointer 



58 










compute II. 


0142 


CE 


7F 


01 




DEC COUNT 


0145 


10 


EE 






BPL GET 


0147 


20 


6A 


IF 




JSR GETKEY 


01 4A 


C9 


15 






CMP #$15 


014C 


F0 


D9 






BEQ, DUMP 


014E 


4C 


64 


1C 




JMP CLEAR 


0151 


20 


2F 


IE 


LOAD 


JSR CRLF 


0154 


20 


5A 


IE 


READ 


JSR GETCH 


0157 


C9 


OD 






CMP #'CR' 


0159 


FO 


- F6 






BEQ LOAD 


015B 


C9 


IB 






CMP #'ESC 


01 5D 


DO 


06 






BNE STORE 


015F 


20 


80 


01 




JSR STRING 


0162 


4C 


64 


1C 




JMP CLEAR 


0165 


20 


AC 


IF 


STORE 


JSR PACK 


0168 


DO 


EA 






BNE READ 


01 6A 


20 


5A 


IE 




JSR GETCH 


016D 


20 


AC 


IF 




JSR PACK 


0170 


AO 


00 






LDY #$00 


0172 


A5 


F8 






LDA INL 


0174 


91 


FA 






STA (POINTL),Y 


0176 


20 


63 


IF 




JSR INCPT 


0179 


18 








CLC 


01 7A 


90 


D8 






BCC READ 


017C 


EA 


EA 


EA 




NOP 


01 7F 


[XX] 






COUNT 


[This location used 


0180 










; Subroutine "STR 


0180 










ORG $0180 


0180 


A2 


OC 




STRING 


LDX #$0C 


0182 


BD 


90 


01 


STRNG2 


LDA TABLE, X 


0185 


20 


AO 


IE 




JSR OUTCH 


0188 


CA 








DEX 


0189 


10 


F7 






BPL STRNG2 


018B 


60 








RTS 


018C 


EA 


EA 


EA 




NOP 


190 


20 


3F 


20 


TABLE 


.BYTE 'SP,?,SP, 


0193 


4D 


49 


4B 




M,I,K 


0196 


20 


3F 


00 




SP,?,NUL, 


0199 


00 


OA 


OD 




NUL,LF,CR 


019C 


OD 








CR' 



June/ July, 1980. 



Decrement the byte counter 

And loop back if not finished yet 

After 16th byte, test for end of list 

. . .and if no key is pressed, 

go back and output another 16 bytes. 

else jump to Clear input buffs.. 

Input one character.. 

..and if it is a carriage return.. 

..let it function, but ignore it.. 

..or if it is "Escape' '...go 015F 

..if not, must be valid.. Store it. 

..else send '? KIM ?' prompter... 

..and clear buffers.. exit load routine 

Pack character into INL,INH 

If packed value is zero, skip it.. 

Get second byte of Hex code 

..and pack it also.. 

Set up for indirect addressing 

Bring in packed value . . 

. . and store it at pointed address 

Increment the double-byte pointer 



Branch always.. 
Waste some space 
:o hold the variable byte cntr] 
STRING" to send KIM prompter 

Set up X-reg as counter 

Get character at TABLE +X 

Ship it out... 

Decrement the counter 

Loop is not finished 

Else return to mainline when done 

NOP's to fill 



Some Instructions To Help It All Make Sense: 

1 . This routine is set up for an I/O device of the 

user's choosing, as long as it is fed thru the KIM 
internal TTY port.. Users with other I/O will 
have to modify the coding to suit their particular 
situation. 

2. The routine is self-contained on Page One and 

leaves all other memory free for user programs, 
but be prepared, as always, to re-read the 
routine from cassette should the stack overwrite 
the routine. 

3. Execute as follows: 

After loading the coding, a "GO" executed at 
address $0100 will get the ball rolling., your 
terminal should immediately execute a CR/LF 



sequence and will pause... Begin by typing in 
the four digit address you wish to start loading, 
or dumping from.. If you err in typing, just 
correct by typing in the correct address again, 
just like the KIM TTY monitor.. A "SPACE" 
after the correct address is in place will enter 
that address into the pointer. . The program will 
again send CR/LF and pause., now, enter "L" 
if you wish to use the rapid load routine, or 
"Q" if you wish a formatted memory dump 
from your indicated address.. If LOAD was 
chosen, you may now begin entering data in two- 
digit HEX and the pointer will be taken care of 
for you automatically., a good way to do this is 



June/July, 1980. 



compute II. 



59 



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Processing and Delivery 

• , No COD's Please 

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TO ORDER: 1. Fill in this Coupon (Print or Type Please) 
2. Attach Check or Money Order and Mai I to: 




NAME 


enclosures 
group 


STREET 
CITY 


STATE ZIP 


771 bush street / san francisco, California 94108 


Please ShiD Prepaid SKE1-1(s) 

@ $24.50 Each 
California Residents please pay 

$26.09(lncludes Sales Tax) 


Color Desired blue □ beige □ 
black □ white □ 


* TM Rohm & Haas 


Patent Applied For 



60 



to enter two hex digits, and then space, as the 
routine will ignore the packed space character and 
only enter the valid hex... If DUMP was chosen, 
the routine will now commence to dump the con- 
tents of memory consecutively from your indica- 
ted address like this: 

0200 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E OF 
0210 EA EA EA . ? etc. 

IT WILL LIST CONTINUOUSLY UNTIL YOU 
PRESS A KEY ON THE KIM KEYPAD AND 
HOLD IT DOWN AT THE END OF A LINE.. 
It will then stop and indicate the stopped address. 



KIM-1 Tidbits 

Hcwey B. Herman 
Chemistry Department 
University of North Carolina at 
Greensboro 
Greensboro, N.C 27412 

I have been using KIM for a number of years and wish 
to share programs which I have developed or modified 
with the readers of Compute II. 

The first item is a modification to the KIM tape 
verify program from Issue #13 of 6502 User's Notes. 
This program has a small bug which affects TTY use. 
The TTY delay characters (CNTL30/CNTH30) are 
stored in $17F2 and $17F3 and are overwritten by a 
section (VEB) of the original verify program. In- 
stead of the comforting KIM message on completion of 
the program, all I got was a meaningless chugging. 
The following program (origin $300) circumvents the 
problem by shortening the VEB section so the delay 
characters remain intact. I now include this in KIM 
Microsoft BASIC, as the User program, so I can check 
tapes after a SAVE. 

Item 2 is a modification to KIM Microsoft 
BASIC (serial number 9011) which allows one to 
append programs on tape to the current one (if any) 
in memory. Line numbers must be higher in the 
appended program and cannot overlap. Otherwise the 
only noticeable change is that one must remember to 
NEW before LOAD when appending is not desired. I 
have found this very helpful in conjunction with a 
renumbering program, written in BASIC (see 6502 
User's Notes no. 13, p. 12). 

I hope these programs will be found useful and 
plan to share other tidbits with Compute II readers 
in the future. 



compute II. 












June/ July, 190O. 








0100 ' 














ouo ;kim tape 


VERIFY PROGRAM 








0120 ; 














0130 ' HARVEY 


B< 


> HERMAN 








0140 ' 














0150 




• BA 


S300 








0160 




• OS 










0170 CHKL 




• DE 


$17E7 








016 CHKH 




• DE 


S17E8 








019 VEB 




• DE 


S17EC 








020 L0AD12 




• DE 


S190F 








0210 L0ADT9 




• DE 


S1929 


0300- 


D8 




0220 VERIFY 




CLD 




0301- 


A9 




0230 




LDA 


#S00 


0303- 


8D E7 


17 


0240 




STA 


CHKL 


0306- 


8D £8 


17 


0250 




STA 


CHKH 


0309- 


A2 06 




0260 




LDX 


#$06 


030B- 


BD 16 


03 


0270 LOADP 




LDA 


PROG-I/X 


030E- 


9D EB 


17 


0280 




STA 


VEB- 1 * X 


0311- 


CA 




0290 




DEX 




0312- 


DO F7 




0300 




BNE 


LOADP 


0314- 


4C 8C 


18 


0310 




JMP 


S188C 


0317- 


CD 00 


00 


0320 PROG 




• BY 


SCD $00 $00 


031A- 


4C ID 


03 


0330 




• BY 


$4C $1D $03 


031D- 


DO 03 




0340 PATCH 




BNE 


FAILED 


031F- 


4C OF 


19 


0350 




JMP 


LOAD 12 


0322- 


4C 29 


19 


360 FAILED 
0370 




JMP 
• EN 


L0ADT9 








0100 ' 














0110 'APPEND 


MODIFICATIONS TO 








0120 ;kim microsoft 


BASIC 








0130 ' SERIAL 


NUMBER 


9011 








0140 ; 














0150 ;harvey 


B. 


HERMAN 








0160 ; 














0170 




• BA 


$2785 








0180 'ADJUST 


TAPE LOAD POINTERS 


2765- 


38 




019 NEVLOAD 




SEC 




2786- 


A5 7A 




0200 




LDA 


♦$7A 


2788- 


E9 03 




0210 




SBC 


#$03 


278A- 


8D F5 


17 


0220 




STA 


$17F5 


278D- 


A5 7B 




0230 




LDA 


•$7B 








0240 'NAIVE HARVEY 




278F- 


BO 02 




0250 




BCS 


SKIP 


2791- 


E9 00 




0260 




SBC 


#$00 


279 3- 


8D F6 


17 


0270 SKIP 




STA 


$17F6 








0280 'ORIGINAL < 


CODE 


CONTINUES 








029 




• BA 


$2744 








0300 'ASSIGN 


ID 


01 TO TAPES 


2744- 


A9 01 




0310 
0320 




LDA 
• BA 


#$01 
$20 26 








0330 'POINTER 


TO NEVLOAD 


2026- 


84 27 




0340 
0350 




• SI 1 

• EN 


NEVLOAD- 1 



June/ July, 1980. 



compute II. 



61 



KIMEX-1 HERE 



SANEATCOMBINATION 



IDEAL FOR DEDICATED INDUSTRIAL OR PERSONAL APPLICATION 

FEATURES 



PLUGS DIRECTLY INTO AND 
COVERS UPPER HALF OF KIM-1 . 
EXPANSION FINGERS CARRIED 
THROUGH FOR FURTHER 
EXPANSION. 

I/O-POWERFUL 8522 VIA 
PROVIDED. 

(VERSATILE INTERFACE 
ADAPTER) 

16 BI-DIRECTIONAL I/O LINES 
4 INTERRUPT/HANDSHAKE 
LINES 

2 INTERVAL TIMERS 
SHIFT REGISTER FOR SERIAL- 
PARALLEL/PARALLEL-SERIAL 
OPERATIONS. 

RAM-SOCKETS PROVIDED FOR 
4K RAM CONTIGUOUS WITH KIM 
RAM. 

(LOW POWER MOSTEK4118 
1KX8's) 
COMPLETE DOCUMENTATION 



e EPROM-SOCKETS PROVIDED FOR 
8K EPROM. 
(INTEL2716 2KX8'3) 

e BLOCK SELECT SWITCHES FOR 
EPROM. 

EPROM USABLE IN ANY ONE OF 
FOUR 8K BLOCKS FROM 8000H. 

e AUTOMATIC RESET ON POWER- 
UP AND SWITCH SELECTABLE 
INTERRUPT VECTORS. 

e PERMITS UNATTENDED 
OPERATION. 

e LOW POWER CONSUMPTION- 
5V AT 300 Ma. FULLY LOADED 

• BUFFERED ADDRESS LINES 

e HIGH QUALITY PC BOARD, 
SOLDER MASK 

e ASSEMBLED AND TESTED 




APPLICATIONS 

PROM, RAM AND I/O EXPANSION ON ONE BOARD HAVING MANY INDUS- 
TRIAL/HOME APPLICATIONS FOR DATA ACQUISITION, PROCESSCONTROL, 
AUTOMATIC CONTROL OF FURNACE, SOLAR HEAT, LIGHTING, APPLI- 
ANCES, ETC 



PA RESIDENTS INCLUDE 6% STATE SALES TAX 



DIGITAL ENGINEERING ASSOCIATES 

P.O.BOX207 • BETHLEHEM, PA 18016 




$139.95 

IF 1K RAM FREE 



* KIM IS A REGISTERED TRADEMARK OF MOS TECHNOLOGY, INC. 



COMPUTE'S BOOK CORNER 

We Now Have One of the 
Best Collections of 6502 
Resource Materials Around: 



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Best of The PET Gazette 

Collected PET User Notes 
Volume 1, Issues 2- 7 

Volume 2, Issue 1 

All 7 issues 

6502 User Notes 

Volume 1, Issues 1 -6 
Volume 2, Issues 1 - 6 
Volume 3, Issues 1 - 5 

All 17 Issues 



$10.00 



$9.00 

$1.50 
SIO.OO 

$ 6.00 
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Add $2.00 shipping & handling 

COMPUTE, P.O. Box 5119, Greensboro, NC 27403 



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KIMSI 
FLOPPY 
DISKS— 



PERRY PERIPHERALS HAS 

THE HDE MINIFLOPPY TO KIMSI 

ADAPTER 

MINIFLOPPY S-100 ADAPTER: $20 
(New Price Effective June 1, 80) 

• FODS and TED Diskette 

• FODS and TED User Manuals 

• Complete Construction Information- 
Not A Kit, No Parts Supplied 

OPTIONS: 

• FODS Bootstrap in EPROM (1st Qtr'80) 

• HDE Assembler (ASM) $75 

• HDE Text Output Processor (TOPS) $135 

(N.Y. State residents add 7% Sales Tax) 

Place your order with: 

PERRY PERIPHERALS 

P.O. Box 924 

Miller Place, N.Y. 11764 

(516)744-6462 

Your "Long Island" HDE Distributor 

KIMSI. a product of Forethought Products 

****** ************ *******